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PC16550DV

更新时间： 2024-11-17 22:44:31

品牌	Logo	应用领域
美国国家半导体 - NSC		先进先出芯片 PC
页数	文件大小	规格书
22页	345K
描述
PC16550D Universal Asynchronous Receiver/Transmitter with FIFOs

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PC16550DV 数据手册

June 1995

PC16550D Universal Asynchronous

Receiver/Transmitter with FIFOs

General Description

Features

Capable of running all existing 16450 software.

Pin for pin compatible with the existing 16450 except

for CSOUT (24) and NC (29). The former CSOUT and

NC pins are TXRDY and RXRDY, respectively.

After reset, all registers are identical to the 16450 reg-

ister set.

The PC16550D is an improved version of the original 16450

Universal Asynchronous Receiver/Transmitter (UART).

Functionally identical to the 16450 on powerup (CHARAC-

TER mode)* the PC16550D can be put into an alternate

mode (FIFO mode) to relieve the CPU of excessive software

overhead.

In this mode internal FIFOs are activated allowing 16 bytes

(plus 3 bits of error data per byte in the RCVR FIFO) to be

stored in both receive and transmit modes. All the logic is on

chip to minimize system overhead and maximize system ef-

ficiency. Two pin functions have been changed to allow sig-

nalling of DMA transfers.

In the FIFO mode transmitter and receiver are each

buffered with 16 byte FIFO’s to reduce the number of

interrrupts presented to the CPU.

Adds or deletes standard asynchronous communication

bits (start, stop, and parity) to or from the serial data.

Holding and shift registers in the 16450 Mode eliminate

the need for precise synchronization between the CPU

and serial data.

The UART performs serial-to-parallel conversion on data

characters received from a peripheral device or a MODEM,

and parallel-to-serial conversion on data characters re-

ceived from the CPU. The CPU can read the complete

status of the UART at any time during the functional opera-

tion. Status information reported includes the type and con-

dition of the transfer operations being performed by the

UART, as well as any error conditions (parity, overrun, fram-

ing, or break interrupt).

Independently controlled transmit, receive, line status,

and data set interrupts.

Programmable baud generator divides any input clock

Independent receiver clock input.

clock.

by 1 to (2

1) and generates the 16

MODEM control functions (CTS, RTS, DSR, DTR, RI,

and DCD).

The UART includes a programmable baud rate generator

that is capable of dividing the timing reference clock input

Fully programmable serial-interface characteristics:

Ð 5-, 6-, 7-, or 8-bit characters

Ð Even, odd, or no-parity bit generation and detection

Ð 1-, 1(/2-, or 2-stop bit generation

Ð Baud generation (DC to 1.5M baud).

False start bit detection.

clock for

driving the internal transmitter logic. Provisions are also in-

by divisors of 1 to (2

1), and producing a 16

cluded to use this 16 clock to drive the receiver logic. The

UART has complete MODEM-control capability, and a proc-

essor-interrupt system. Interrupts can be programmed to

the user’s requirements, minimizing the computing required

to handle the communications link.

Complete status reporting capabilities.

TRI-STATE TTL drive for the data and control buses.

Line break generation and detection.

The UART is fabricated using National Semiconductor’s ad-

vanced M CMOS process.

Internal diagnostic capabilities:

Ð Loopback controls for communications link fault

isolation

*Can also be reset to 16450 Mode under software control.

Ð Break, parity, overrun, framing error simulation.

Full prioritized interrupt system controls.

Note: This part is patented.

Basic Configuration

TL/C/8652–1

TRI-STATEÉ is a registered trademark of National Semiconductor Corp.

1995 National Semiconductor Corporation

TL/C/8652

RRD-B30M75/Printed in U. S. A.

12 3 4 5 6 7...22

中文翻译

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PC16550DV 替代型号

型号	品牌	替代类型	描述	数据表
PC16552DVX/NOPB	NSC	类似代替	IC 2 CHANNEL(S), 1.5M bps, SERIAL COMM CONTROLLER, PQCC44, ROHS COMPLIANT, PLASTIC, LCC-44

与PC16550DV相关器件

型号	品牌	获取价格	描述	数据表
PC16550DV/NOPB	NSC	获取价格	IC 1 CHANNEL(S), 1.5M bps, SERIAL COMM CONTROLLER, PQCC44, PLASTIC, LCC-44, Serial IO/Comm
PC16550DVEF	NSC	获取价格	PC16550D Universal Asynchronous Receiver/Transmitter with FIFOs
PC16550DVX	NSC	获取价格	Engineering Project Manager
PC16550MDA	NSC	获取价格	IC 1 CHANNEL(S), 1.5M bps, SERIAL COMM CONTROLLER, UUC, DIE, Serial IO/Communication Contr
PC16552C	NSC	获取价格	Dual Universal Asynchronous Receiver/Transmitter with FIFOs
PC16552C/A+	ETC	获取价格	UART
PC16552C/NS16C552	ETC	获取价格	Dual Universal Asynchronous Receiver/Transmitter with FIFOs
PC16552CV	NSC	获取价格	Dual Universal Asynchronous Receiver/Transmitter with FIFOs
PC16552D	NSC	获取价格	Dual Universal Asynchronous Receiver/Transmitter with FIFOs
PC16552DV	NSC	获取价格	Dual Universal Asynchronous Receiver/Transmitter with FIFOs

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