Low VCE(sat) NPN
Transistors, 60 V, 1 A
NSS60101DMR6
2
ON Semiconductor’s e PowerEdge family of low V
CE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (V ) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
CE(sat)
www.onsemi.com
60 Volt, 1 Amp
Typical applications are DC−DC converters and LED lightning,
power management…etc. In the automotive industry they can be used
in air bag deployment and in the instrument cluster. The high current
NPN Low V
Transistors
CE(sat)
2
gain allows e PowerEdge devices to be driven directly from PMU’s
MARKING
DIAGRAM
control outputs, and the Linear Gain (Beta) makes them ideal
components in analog amplifiers.
SC−74
CASE 318F
6
Features
RAD MG
1
• NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
G
RAD= Specific Device Code
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
M
G
= Date Code
= Pb−Free Package
Compliant
(Note: Microdot may be in either location)
MAXIMUM RATINGS (T = 25°C)
A
Rating
Collector−Emitter Voltage
Symbol
Max
60
80
6
Unit
Vdc
Vdc
Vdc
A
PIN CONNECTIONS
V
CEO
V
CBO
V
EBO
E
B
C
1
2
3
6
5
4
C
B
E
Collector−Base Voltage
Emitter−Base Voltage
Collector Current − Continuous
Collector Current − Peak
I
C
1
I
2
A
CM
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
6
5
1
2
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Thermal Resistance Junction−to−Ambient
(Notes 1 and 2)
R
234
°C/W
q
JA
4
3
Total Power Dissipation per Package @
A
P
0.53
300
W
°C/W
W
D
T = 25°C (Note 2)
Thermal Resistance Junction−to−Ambient
(Note 3)
R
q
ORDERING INFORMATION
JA
†
Device
Package
Shipping
Power Dissipation per Transistor @ T = 25°C
P
D
0.40
A
(Note 3)
NSS60101DMR6T1G
NSS60101DMR6T2G
NSV60101DMR6T1G
NSV60101DMR6T2G
Junction and Storage Temperature Range
T , T
J
−55 to
+150
°C
SC−74
(Pb−Free)
3000/Tape &
Reel
stg
2
1. Per JESD51−7 with 100 mm pad area and 2 oz. Cu (Dual Operation).
2. P per Transistor when both are turned on is one half of Total P or 0.53 Watts.
D
D
2
3. Per JESD51−7 with 100 mm pad area and 2 oz. Cu (Single−Operation).
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
February, 2020 − Rev. 3
NSS60101DMR6/D