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NLSX0102

更新时间： 2024-11-02 12:22:51
品牌 Logo 应用领域
安森美 - ONSEMI 转换器电平转换器
页数 文件大小 规格书
10页 141K
描述
2-Bit 20 Mb/s Dual-Supply Level Translator

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中文翻译

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NLSX0102 数据手册

 浏览型号NLSX0102的Datasheet PDF文件第2页浏览型号NLSX0102的Datasheet PDF文件第3页浏览型号NLSX0102的Datasheet PDF文件第4页浏览型号NLSX0102的Datasheet PDF文件第5页浏览型号NLSX0102的Datasheet PDF文件第6页浏览型号NLSX0102的Datasheet PDF文件第7页 
NLSX0102  
2-Bit 20 Mb/s Dual-Supply  
Level Translator  
The NLSX0102 is a 2−bit configurable dual−supply bidirectional  
auto sensing translator that does not require a directional control pin.  
The I/O V and I/O V ports are designed to track two different  
CC  
L
http://onsemi.com  
MARKING  
power supply rails, V and V respectively. Both the V and V  
CC  
L
CC  
L
supply rails are configurable from 1.5 V to 5.5 V. This allows voltage  
logic signals on the V side to be translated into lower, higher or equal  
L
DIAGRAM  
value voltage logic signals on the V side, and vice−versa.  
CC  
A2  
The NLSX0102 translator has integrated 10 kW pull−up resistors on  
the I/O lines. The integrated pull−up resistors are used to pull−up the  
AAG  
AYWW  
A1  
I/O lines to either V or V . The NLSX0102 is an excellent match  
L
CC  
2
FLIP−CHIP 8  
CASE 499BF  
D1  
A1  
for open−drain applications such as the I C communication bus.  
Features  
• V can be Less than, Greater than or Equal to V  
L
CC  
AAG  
A
Y
= Specific Device Code  
= Assembly Location  
= Year  
• Wide V Operating Range: 1.5 V to 5.5 V  
CC  
Wide V Operating Range: 1.5 V to 5.5 V  
L
WW  
= Work Week  
• High−Speed with 24 Mb/s Guaranteed Date Rate  
• Low Bit−to−Bit Skew  
PIN ASSIGNMENTS  
• Enable Input and I/O Pins are  
Overvoltage Tolerant (OVT) to 5.5 V  
• Non−preferential Power−up Sequencing  
A1  
B1  
C1  
D1  
A2  
B2  
C2  
D2  
I/O V  
2
I/O V  
1
CC  
CC  
• Integrated 10 kW Pull−up Resistors  
• Small Space Saving Package  
− 1.9 mm x 0.9 mm x 0.5 mm Flipchip8  
• This is a Pb−Free Device  
GND  
V
CC  
EN  
I/O V 1  
V
L
I/O V 2  
L
L
Typical Applications  
2
• I C, SMBus  
(Top View)  
• Low Voltage ASIC Level Translation  
• Mobile Phones, PDAs, Cameras  
LOGIC DIAGRAM  
V
L
V
CC  
GND  
EN  
Important Information  
• ESD Protection for All Pins  
− Human Body Model (HBM) > 7000 V  
I/O V 1  
I/O V  
I/O V  
1
2
L
CC  
I/O V 2  
L
CC  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 9 of this data sheet.  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
October, 2011 − Rev. 1  
NLSX0102/D  
1234567...10

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