Datasheet > NLSX3014

NLSX3014

更新时间： 2024-11-02 05:53:59

品牌	Logo	应用领域
安森美 - ONSEMI		转换器电平转换器
页数	文件大小	规格书
10页	135K
描述
4-Bit 100 Mb/s Configurable Dual-Supply Level Translator

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NLSX3014 数据手册

NLSX3014

4-Bit 100 Mb/s Configurable

Dual-Supply Level

Translator

The NLSX3014 is a 4−bit configurable dual−supply bidirectional

level translator without a direction control pin. The I/O V − and I/O

http://onsemi.com

MARKING

V −ports are designed to track two different power supply rails, V

and V respectively. The V supply rail is configurable from 1.3 V

to 4.5 V while the V supply rail is configurable from 0.9 V to (V

DIAGRAM

− 0.4) V. This allows lower voltage logic signals on the V side to be

UTMG

translated into higher voltage logic signals on the V

side, and

UQFN12

MU SUFFIX

CASE 523AE

vice−versa. Both I/O ports are auto−sensing; thus, no direction pin is

required.

The Output Enable (EN) input, when Low, disables both I/O ports

by putting them in 3−state. This significantly reduces the supply

UT = Specific Device Code

= Date Code

= Pb−Free Package

currents from both V and V . The EN signal is designed to track

(Note: Microdot may be in either location)

V .

LOGIC DIAGRAM

Features

GND

• Wide High−Side V Operating Range: 1.3 V to 4.5 V

Wide Low−Side V Operating Range: 0.9 V to (V − 0.4) V

• High−Speed with 100 Mb/s Guaranteed Date Rate for V > 1.6 V

• Low Bit−to−Bit Skew

I/O V 1

• Overvoltage Tolerant Enable and I/O Pins

• Non−preferential Powerup Sequencing

• Small packaging: 1.7 mm x 2.0 mm UQFN12

• This is a Pb−Free Device

I/O V 2

I/O V

Typical Applications

• Mobile Phones, PDAs, Other Portable Devices

I/O V 3

I/O V 4

PIN ASSIGNMENT

I/O V 1

I/O V

I/O V 2

I/O V

I/O V 3

I/O V

I/O V 4

GND

(TOP VIEW)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 9 of this data sheet.

Semiconductor Components Industries, LLC, 2008

Publication Order Number:

July, 2008 − Rev. 4

NLSX3014/D

12 3 4 5 6 7...10

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