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NLAST4053QSR PDF预览

NLAST4053QSR

更新时间: 2024-09-14 11:01:43
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
14页 132K
描述
Analog Multiplexer / Demultiplexer

NLAST4053QSR 数据手册

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NLAST4053  
Analog Multiplexer/  
Demultiplexer  
TTL Compatible, Triple 2:1 Analog  
Switch-Multiplexer Improved Process,  
Sub-Micron Silicon Gate CMOS  
http://onsemi.com  
The NLAST4053 is an improved version of the MC14053 and  
MC74HC4053 fabricated in sub-micron Silicon Gate CMOS  
MARKING  
DIAGRAM  
technology for lower R  
resistance and improved linearity with  
low current. This device may be operated either with a single supply or  
DS(on)  
16  
AST  
4053  
ALYW  
TSSOP-16  
DT SUFFIX  
CASE 948F  
dual supply up to 3 V to pass a 6 V signal without coupling  
PP  
capacitors.  
When operating in single supply mode, it is only necessary to tie  
1
V , pin 7 to ground. For dual supply operation, V is tied to a  
EE EE  
negative voltage, not to exceed maximum ratings. Translation is  
provided in the device, the Address and Inhibit pins are standard TTL  
level compatible. For CMOS compatibility see NLAS4053. Pin for  
pin compatible with all industry standard versions of `4053.'  
A
L
Y
W
=
=
=
=
Assembly Location  
Wafer Lot  
Year  
Work Week  
ꢀImproved R  
Specifications  
DS(on)  
ORDERING INFORMATION  
ꢀPin for Pin Replacement for MAX4053 and MAX4053A  
- One Half the Resistance Operating at 5.0 Volts  
Device  
Package  
Shipping  
ꢀSingle or Dual Supply Operation  
NLAST4053DTR2G TSSOP-16 2500 / Tape &  
(Pb-Free) Reel  
- Single 3-5 Volt Operation, or Dual 3 Volt Operation  
- With V of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,  
CC  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
- No Translators Needed  
- Address and Inhibit Pins are Over-Voltage Tolerant and May Be  
- Driven Up +6ꢁV Regardless of V  
CC  
ꢀAddress and Inhibit Pins are Standard TTL Compatible  
- Greatly Improved Noise Margin Over MAX4053 and MAX4053A  
- True TTL Compatibility V = 0.8 V, V = 2.0 V  
IL IH  
ꢀImproved Linearity Over Standard HC4053 Devices  
ꢀPopular SOIC, and Space Saving TSSOP, and QSOP 16 Pin  
Packages  
ꢀThis is a Pb-Free Device  
©ꢀ Semiconductor Components Industries, LLC, 2008  
February, 2008 - Rev. 1  
1
Publication Order Number:  
NLAST4053/D  

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