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NLAST4599DFT2G PDF预览

NLAST4599DFT2G

更新时间: 2024-11-05 03:46:23
品牌 Logo 应用领域
安森美 - ONSEMI 复用器开关复用器或开关信号电路光电二极管PC
页数 文件大小 规格书
12页 139K
描述
Low Voltage Single Supply SPDT Analog Switch

NLAST4599DFT2G 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOT-363
包装说明:SOT-363, 6 PIN针数:6
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.04Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:226675
Samacsys Pin Count:6Samacsys Part Category:Integrated Circuit
Samacsys Package Category:SOT23 (6-Pin)Samacsys Footprint Name:SC-88(SOT-363) CASE 419B-02
Samacsys Released Date:2015-08-26 09:51:52Is Samacsys:N
模拟集成电路 - 其他类型:SPDTJESD-30 代码:R-PDSO-G6
JESD-609代码:e3长度:2 mm
湿度敏感等级:1信道数量:1
功能数量:1端子数量:6
标称断态隔离度:93 dB通态电阻匹配规范:3 Ω
最大通态电阻 (Ron):55 Ω最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:2.5/5 V
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:Multiplexer or Switches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3 V
表面贴装:YES最长断开时间:15 ns
最长接通时间:25 ns切换:BREAK-BEFORE-MAKE
技术:CMOS温度等级:MILITARY
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:1.25 mm
Base Number Matches:1

NLAST4599DFT2G 数据手册

 浏览型号NLAST4599DFT2G的Datasheet PDF文件第2页浏览型号NLAST4599DFT2G的Datasheet PDF文件第3页浏览型号NLAST4599DFT2G的Datasheet PDF文件第4页浏览型号NLAST4599DFT2G的Datasheet PDF文件第5页浏览型号NLAST4599DFT2G的Datasheet PDF文件第6页浏览型号NLAST4599DFT2G的Datasheet PDF文件第7页 
NLAST4599  
Low Voltage Single Supply  
SPDT Analog Switch  
The NLAST4599 is an advanced high speed CMOS single pole −  
double throw analog switch fabricated with silicon gate CMOS  
technology. It achieves high speed propagation delays and low ON  
resistances while maintaining low power dissipation. This switch  
controls analog and digital voltages that may vary across the full  
http://onsemi.com  
power−supply range (from V to GND).  
CC  
The device has been designed so the ON resistance (R ) is much  
MARKING  
ON  
lower and more linear over input voltage than R of typical CMOS  
DIAGRAMS  
ON  
analog switches.  
The channel select input structure provides protection when  
voltages between 0 V and 5.5 V are applied, regardless of the supply  
voltage. This input structure helps prevent device destruction caused  
by supply voltage − input/output voltage mismatch, battery backup,  
hot insertion, etc.  
TSOP−6  
DT SUFFIX  
CASE 318G  
A1AYWG  
G
1
Features  
SC−88/SC−70/SOT−363  
DF SUFFIX  
Select Pin Compatible with TTL Levels  
Channel Select Input Over−Voltage Tolerant to 5.5 V  
Fast Switching and Propagation Speeds  
A1 M G  
G
CASE 419B  
1
Break−Before−Make Circuitry  
Low Power Dissipation: I = 2 A (Max) at T = 25°C  
CC  
A
A1 = Specific Device Code  
Diode Protection Provided on Channel Select Input  
Improved Linearity and Lower ON Resistance over Input Voltage  
Latch−up Performance Exceeds 300 mA  
ESD Performance: HBM > 2000 V; MM > 200 V  
Chip Complexity: 38 FETs  
A
Y
W
M
G
= Assembly Location  
= Year  
= Work Week  
= Date Code*  
= Pb−Free Package  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position and underbar  
may vary depending upon manufacturing location.  
Pb−Free Packages are Available  
FUNCTION TABLE  
1
2
3
NO  
6
5
4
SELECT  
Select  
ON Channel  
V
+
COM  
NC  
L
NC  
NO  
H
GND  
ORDERING INFORMATION  
Figure 1. Pin Assignment  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
CHANNEL SELECT  
COM  
2 X 0  
2 X 1  
U
U
NO  
NC  
U
Figure 2. Logic Symbol  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
May, 2006 − Rev. 8  
NLAST4599/D  

NLAST4599DFT2G 替代型号

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