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NLAST9431 PDF预览

NLAST9431

更新时间: 2024-11-20 03:46:23
品牌 Logo 应用领域
安森美 - ONSEMI 开关光电二极管
页数 文件大小 规格书
11页 102K
描述
Low Voltage Single Supply Dual DPDT Analog Switch

NLAST9431 数据手册

 浏览型号NLAST9431的Datasheet PDF文件第2页浏览型号NLAST9431的Datasheet PDF文件第3页浏览型号NLAST9431的Datasheet PDF文件第4页浏览型号NLAST9431的Datasheet PDF文件第5页浏览型号NLAST9431的Datasheet PDF文件第6页浏览型号NLAST9431的Datasheet PDF文件第7页 
NLAST9431  
Low Voltage Single Supply  
Dual DPDT Analog Switch  
The NLAST9431 is an advanced CMOS dual−independent DPDT  
(double pole−double throw) analog switch, fabricated with silicon  
gate CMOS technology. It achieves high−speed propagation delays  
and low ON resistances while maintaining CMOS low−power  
dissipation. This DPDT controls analog and digital voltages that may  
http://onsemi.com  
vary across the full power−supply range (from V to GND).  
MARKING  
CC  
The device has been designed so the ON resistance (R ) is much  
DIAGRAMS  
ON  
lower and more linear over input voltage than R of typical CMOS  
analog switches.  
ON  
16  
1
The channel−select input structure provides protection when  
voltages between 0 V and 5.5 V are applied, regardless of the supply  
voltage. This input structure helps prevent device destruction caused  
by supply voltage − input/output voltage mismatch, battery backup,  
hot insertion, etc.  
BB M  
G
WQFN16  
CASE 488AP  
The NLAST9431 can also be used as a quad 2−to−1 multiplexer−  
demultiplexer analog switch with two Select pins that each controls  
two multiplexer−demultiplexers.  
BB  
M
G
= Specific Device Code  
= Date Code & Assembly Location  
= Pb−Free Device  
Select Pins Compatible with TTL Levels  
Channel Select Input Overvoltage Tolerant to 5.5 V  
Fast Switching and Propagation Speeds  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
Break−Before−Make Circuitry  
dimensions section on page 10 of this data sheet.  
Low Power Dissipation: I = 2 A (Max) at T = 25°C  
CC  
A
Diode Protection Provided on Channel Select Input  
Improved Linearity and Lower ON Resistance over Input Voltage  
Latch−up Performance Exceeds 300 mA  
Chip Complexity: 158 FETs  
Pb−Free Packages are Available  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
January, 2006 − Rev. 0  
NLAST9431/D  

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