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NLASTV4599DFT2G PDF预览

NLASTV4599DFT2G

更新时间: 2024-11-02 11:01:43
品牌 Logo 应用领域
安森美 - ONSEMI 开关光电二极管信号电路复用器复用器或开关
页数 文件大小 规格书
12页 139K
描述
单 SPDT 模拟开关单电源,TTL 电平

NLASTV4599DFT2G 数据手册

 浏览型号NLASTV4599DFT2G的Datasheet PDF文件第2页浏览型号NLASTV4599DFT2G的Datasheet PDF文件第3页浏览型号NLASTV4599DFT2G的Datasheet PDF文件第4页浏览型号NLASTV4599DFT2G的Datasheet PDF文件第5页浏览型号NLASTV4599DFT2G的Datasheet PDF文件第6页浏览型号NLASTV4599DFT2G的Datasheet PDF文件第7页 
NLAST4599  
Low Voltage Single Supply  
SPDT Analog Switch  
The NLAST4599 is an advanced high speed CMOS single pole −  
double throw analog switch fabricated with silicon gate CMOS  
technology. It achieves high speed propagation delays and low ON  
resistances while maintaining low power dissipation. This switch  
controls analog and digital voltages that may vary across the full  
http://onsemi.com  
power−supply range (from V to GND).  
CC  
The device has been designed so the ON resistance (R ) is much  
MARKING  
ON  
lower and more linear over input voltage than R of typical CMOS  
DIAGRAMS  
ON  
analog switches.  
The channel select input structure provides protection when  
voltages between 0 V and 5.5 V are applied, regardless of the supply  
voltage. This input structure helps prevent device destruction caused  
by supply voltage − input/output voltage mismatch, battery backup,  
hot insertion, etc.  
TSOP−6  
DT SUFFIX  
CASE 318G  
A1AYWG  
G
1
Features  
SC−88/SC−70/SOT−363  
DF SUFFIX  
Select Pin Compatible with TTL Levels  
Channel Select Input Over−Voltage Tolerant to 5.5 V  
Fast Switching and Propagation Speeds  
A1 M G  
G
CASE 419B  
1
Break−Before−Make Circuitry  
Low Power Dissipation: I = 2 A (Max) at T = 25°C  
CC  
A
A1 = Specific Device Code  
Diode Protection Provided on Channel Select Input  
Improved Linearity and Lower ON Resistance over Input Voltage  
Latch−up Performance Exceeds 300 mA  
ESD Performance: HBM > 2000 V; MM > 200 V  
Chip Complexity: 38 FETs  
A
Y
W
M
G
= Assembly Location  
= Year  
= Work Week  
= Date Code*  
= Pb−Free Package  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position and underbar  
may vary depending upon manufacturing location.  
Pb−Free Packages are Available  
FUNCTION TABLE  
1
2
3
NO  
6
5
4
SELECT  
Select  
ON Channel  
V
+
COM  
NC  
L
NC  
NO  
H
GND  
ORDERING INFORMATION  
Figure 1. Pin Assignment  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
CHANNEL SELECT  
COM  
2 X 0  
2 X 1  
U
U
NO  
NC  
U
Figure 2. Logic Symbol  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
May, 2006 − Rev. 8  
NLAST4599/D  

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