NLAS4051
Analog Multiplexer/
Demultiplexer
TTL Compatible, Single−Pole, 8−Position
Plus Common Off
http://onsemi.com
The NLAS4051 is an improved version of the MC14051 and
MC74HC4051 fabricated in sub−micron Silicon Gate CMOS
MARKING
DIAGRAMS
technology for lower R
resistance and improved linearity with
DS(on)
low current. This device may be operated either with a single supply or
16
dual supply up to 3.0 V to pass a 6.0 V signal without coupling
PP
SOIC−16
NLAS4051G
AWLYWW
capacitors.
D SUFFIX
CASE 751B
When operating in single supply mode, it is only necessary to tie
1
1
V
EE
, pin 7 to ground. For dual supply operation, V is tied to a
EE
negative voltage, not to exceed maximum ratings.
16
Features
NLAS
4051
ALYWG
G
TSSOP−16
DT SUFFIX
CASE 948F
• Improved R
Specifications
DS(on)
• Pin for Pin Replacement for MAX4051 and MAX4051A
♦ One Half the Resistance Operating at 5.0 V
• Single or Dual Supply Operation
1
1
♦ Single 2.5−5.0 V Operation, or Dual 3.0 V Operation
16
♦ With V of 3.0 to 3.3 V, Device Can Interface with 1.8 V
Logic, No Translators Needed
♦ Address and Inhibit Logic are Over−Voltage Tolerant and May
CC
QSOP−16
QS SUFFIX
CASE 492
S4051
ALYW
1
Be Driven Up +6.0 V Regardless of V
CC
1
• Improved Linearity Over Standard HC4051 Devices
• Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin
A
= Assembly Location
WL, L = Wafer Lot
= Year
Packages
Y
• Pb−Free Packages are Available*
WW, W = Work Week
G or G = Pb−Free Package
ORDERING INFORMATION
V
NO
15
NO
NO
13
NO ADD ADD ADD
6 C B A
CC
2
4
0
†
Shipping
Device
Package
16
14
12
11
10
9
NLAS4051DR2
SOIC−16 2500/Tape & Reel
NLAS4051DR2G
SOIC−16 2500/Tape & Reel
(Pb−Free)
NLAS4051DTR2
TSSOP−16 2500/Tape & Reel
NLAS4051DTR2G TSSOP−16 2500/Tape & Reel
(Pb−Free)
1
2
3
4
5
6
7
8
NO
NO COM NO
NO Inhibit
V
EE
GND
1
3
7
5
NLAS4051QSR
QSOP−16 2500/Tape & Reel
Figure 1. Pin Connection
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
(Top View)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
May, 2006 − Rev. 3
NLAS4051/D