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NLAS44599 PDF预览

NLAS44599

更新时间: 2024-11-23 03:46:23
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安森美 - ONSEMI 开关光电二极管
页数 文件大小 规格书
12页 168K
描述
Low Voltage Single Supply Dual DPDT Analog Switch

NLAS44599 数据手册

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NLAS44599  
Low Voltage Single Supply  
Dual DPDT Analog Switch  
The NLAS44599 is an advanced dualindependent CMOS double  
poledouble throw (DPDT) analog switch fabricated with silicon  
gate CMOS technology. It achieves high speed propagation delays  
and low ON resistances while maintaining CMOS low power  
dissipation. This DPDT controls analog and digital voltages that may  
http://onsemi.com  
MARKING  
vary across the full powersupply range (from V to GND).  
CC  
The device has been designed so the ON resistance (R ) is much  
DIAGRAMS  
ON  
lower and more linear over input voltage than R of typical CMOS  
analog switches.  
ON  
16  
16  
1
1
AS  
4459  
ALYW  
The channel select input is compatible with standard CMOS outputs.  
The channel select input structure provides protection when  
voltages between 0 V and 5.5 V are applied, regardless of the supply  
voltage. This input structure helps prevent device destruction caused  
by supply voltage input/output voltage mismatch, battery backup,  
hot insertion, etc.  
C
ALYW  
QFN16  
MN SUFFIX  
CASE 485G  
Current  
Previous  
Part Marking*  
Part Marking  
The NLAS44599 can also be used as a quad 2to1 multiplexer−  
demultiplexer analog switch with two Select pins that each controls  
two multiplexerdemultiplexers.  
*Previous releases of this device may be marked as  
shown in this diagram.  
Channel Select Input OverVoltage Tolerant to 5.5 V  
Fast Switching and Propagation Speeds  
BreakBeforeMake Circuitry  
16  
NLAS  
4459  
ALYW  
16  
1
Low Power Dissipation: I = 2 A (Max) at T = 25°C  
1
CC  
A
Diode Protection Provided on Channel Select Input  
Improved Linearity and Lower ON Resistance over Input Voltage  
Latchup Performance Exceeds 300 mA  
TSSOP16  
DT SUFFIX  
CASE 948F  
ESD Performance: Human Body Model; > 2000 V,  
Machine Model; > 200 V  
A
L
Y
= Assembly Location  
= Wafer Lot  
= Year  
Chip Complexity: 158 FETs  
PbFree Packages are Available  
W
= Work Week  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 10 of this data sheet.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
April, 2005 Rev. 13  
NLAS44599/D  

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