Datasheet > NLAS4051S

NLAS4051S

更新时间： 2024-11-19 05:54:07

品牌	Logo	应用领域
安森美 - ONSEMI		解复用器
页数	文件大小	规格书
11页	153K
描述
Analog Multiplexer/ Demultiplexer

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NLAS4051S 数据手册

NLAS4051S

Analog Multiplexer/

Demultiplexer

TTL Compatible, Single−Pole, 8−Position

Plus Common Off

http://onsemi.com

The NLAS4051S is an improved version of the MC14051 and

MC74HC4051 fabricated in sub−micron Silicon Gate CMOS

MARKING

DIAGRAM

technology for lower R

resistance and improved linearity with

DS(on)

low current. This device may be operated either with a single supply or

dual supply up to 3.0 V to pass a 6.0 V signal without coupling

capacitors.

NLAS

4051

ALYWG

When operating in single supply mode, it is only necessary to tie

TSSOP−16

DT SUFFIX

CASE 948F

V , pin 7 to ground. For dual supply operation, V is tied to a

negative voltage, not to exceed maximum ratings.

Features

• Improved R

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

Specifications

DS(on)

• Pin for Pin Replacement for MAX4051 and MAX4051A

♦ One Half the Resistance Operating at 5.0 V

• Single or Dual Supply Operation

(Note: Microdot may be in either location)

♦ Single 2.5−5.0 V Operation, or Dual 3.0 V Operation

♦ With V of 3.0 to 3.3 V, Device Can Interface with 1.8 V

Logic, No Translators Needed

♦ Address and Inhibit Logic are Over−Voltage Tolerant and May

ORDERING INFORMATION

Be Driven Up +6.0 V Regardless of V

†

Shipping

Device

Package

• Improved Linearity Over Standard HC4051 Devices

• Space Saving TSSOP Package

NLAS4051SDTR2G TSSOP−16 2500/Tape & Reel

(Pb−Free)

• This is a Pb−Free Device

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

NO ADD ADD ADD

6 C B A

Inhibit

NO COM NO

GND

Figure 1. Pin Connection

(Top View)

Publication Order Number:

May, 2008 − Rev. 0

NLAS4051S/D

12 3 4 5 6 7...11

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