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NLAS4051DR2G PDF预览

NLAS4051DR2G

更新时间: 2024-10-01 03:46:23
品牌 Logo 应用领域
安森美 - ONSEMI 解复用器光电二极管
页数 文件大小 规格书
11页 135K
描述
Analog Multiplexer/ Demultiplexer TTL Compatible, Single-Pole, 8-Position Plus Common Off

NLAS4051DR2G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.7
其他特性:ALSO OPERATE WITH 2.5 TO 5.5V SINGLE SUPPLY模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXER
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:9.9 mm湿度敏感等级:1
负电源电压最大值(Vsup):-5.5 V负电源电压最小值(Vsup):
标称负供电电压 (Vsup):-3 V信道数量:8
功能数量:1端子数量:16
标称断态隔离度:93 dB通态电阻匹配规范:15 Ω
最大通态电阻 (Ron):37 Ω最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:-3,3/5 V
认证状态:Not Qualified座面最大高度:1.75 mm
最大信号电流:0.05 A子类别:Multiplexer or Switches
最大供电电流 (Isup):0.08 mA最大供电电压 (Vsup):6.6 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):3 V
表面贴装:YES最长断开时间:28 ns
最长接通时间:28 ns切换:BREAK-BEFORE-MAKE
技术:CMOS温度等级:MILITARY
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3.9 mm
Base Number Matches:1

NLAS4051DR2G 数据手册

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NLAS4051  
Analog Multiplexer/  
Demultiplexer  
TTL Compatible, Single−Pole, 8−Position  
Plus Common Off  
http://onsemi.com  
The NLAS4051 is an improved version of the MC14051 and  
MC74HC4051 fabricated in sub−micron Silicon Gate CMOS  
MARKING  
DIAGRAMS  
technology for lower R  
resistance and improved linearity with  
DS(on)  
low current. This device may be operated either with a single supply or  
16  
dual supply up to 3.0 V to pass a 6.0 V signal without coupling  
PP  
SOIC−16  
NLAS4051G  
AWLYWW  
capacitors.  
D SUFFIX  
CASE 751B  
When operating in single supply mode, it is only necessary to tie  
1
1
V
EE  
, pin 7 to ground. For dual supply operation, V is tied to a  
EE  
negative voltage, not to exceed maximum ratings.  
16  
Features  
NLAS  
4051  
ALYWG  
G
TSSOP−16  
DT SUFFIX  
CASE 948F  
Improved R  
Specifications  
DS(on)  
Pin for Pin Replacement for MAX4051 and MAX4051A  
One Half the Resistance Operating at 5.0 V  
Single or Dual Supply Operation  
1
1
Single 2.5−5.0 V Operation, or Dual 3.0 V Operation  
16  
With V of 3.0 to 3.3 V, Device Can Interface with 1.8 V  
Logic, No Translators Needed  
Address and Inhibit Logic are Over−Voltage Tolerant and May  
CC  
QSOP−16  
QS SUFFIX  
CASE 492  
S4051  
ALYW  
1
Be Driven Up +6.0 V Regardless of V  
CC  
1
Improved Linearity Over Standard HC4051 Devices  
Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin  
A
= Assembly Location  
WL, L = Wafer Lot  
= Year  
Packages  
Y
Pb−Free Packages are Available*  
WW, W = Work Week  
G or G = Pb−Free Package  
ORDERING INFORMATION  
V
NO  
15  
NO  
NO  
13  
NO ADD ADD ADD  
6 C B A  
CC  
2
4
0
Shipping  
Device  
Package  
16  
14  
12  
11  
10  
9
NLAS4051DR2  
SOIC−16 2500/Tape & Reel  
NLAS4051DR2G  
SOIC−16 2500/Tape & Reel  
(Pb−Free)  
NLAS4051DTR2  
TSSOP−16 2500/Tape & Reel  
NLAS4051DTR2G TSSOP−16 2500/Tape & Reel  
(Pb−Free)  
1
2
3
4
5
6
7
8
NO  
NO COM NO  
NO Inhibit  
V
EE  
GND  
1
3
7
5
NLAS4051QSR  
QSOP−16 2500/Tape & Reel  
Figure 1. Pin Connection  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
(Top View)  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
May, 2006 − Rev. 3  
NLAS4051/D  

NLAS4051DR2G 替代型号

型号 品牌 替代类型 描述 数据表
NLAS4051DR2 ONSEMI

完全替代

Analog Multiplexer/ Demultiplexer TTL Compatible, Single-Pole, 8-Position Plus Common Off
CD74HC4051M96 TI

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