Datasheet > NL17SZ08EDFT2G

NL17SZ08EDFT2G

更新时间： 2024-11-21 11:15:47

品牌	Logo	应用领域
安森美 - ONSEMI		逻辑集成电路
页数	文件大小	规格书
6页	150K
描述
单 2 输入 NAND 门极

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中文翻译

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技术参数
数据手册

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NL17SZ08EDFT2G 技术参数

是否无铅：	不含铅	生命周期：	Active
包装说明：	,	Reach Compliance Code：	compliant
风险等级：	5.75	JESD-609代码：	e3
逻辑集成电路类型：	AND GATE	湿度敏感等级：	1
峰值回流温度（摄氏度）：	NOT SPECIFIED	端子面层：	Tin (Sn)
处于峰值回流温度下的最长时间：	NOT SPECIFIED	Base Number Matches：	1

NL17SZ08EDFT2G 数据手册

NL17SZ08E

Single 2-Input AND Gate

The NL17SZ08E is a single 2−input AND Gate in three tiny

footprint packages. The device performs much as LCX multi−gate

products in speed and drive. They should be used wherever the need

for higher speed and drive are needed.

www.onsemi.com

Features

• Tiny SOT−353 Package

MARKING

DIAGRAMS

• 2.7 ns T at 5.0 V (typ)

• Source/Sink 24 mA at 3.0 V

• Overvoltage Tolerant Inputs

• Chip Complexity: FETs = 20

SC−88A

(SC−70−5/SOT−353)

DF SUFFIX

L2 MG

• Designed for 1.65 V to 5.5 V V Operation

CASE 419A

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

L2 = Specific Device Marking

= Date Code*

= Pb−Free Package

Compliant

(Note: Microdot may be in either location)

IN B

*Date Code orientation and/or position may

vary depending upon manufacturing location.

IN A

PIN ASSIGNMENT

OUT Y

GND

Function

IN B

IN A

GND

Figure 1. Pinout (Top View)

OUT Y

IN A

IN B

OUT Y

FUNCTION TABLE

Output

Y = AB

Figure 2. Logic Symbol

Input

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Publication Order Number:

September, 2018 − Rev. 1

NL17SZ08E/D

12 3 4 5 6

中文翻译

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