5秒后页面跳转
NL17SZ08XV5T2G PDF预览

NL17SZ08XV5T2G

更新时间: 2024-11-02 03:46:23
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 115K
描述
Single 2−Input AND Gate

NL17SZ08XV5T2G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOT
包装说明:VSOF, FL5/6,.047,20针数:5
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:1.06
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-F5
JESD-609代码:e3长度:1.6 mm
负载电容(CL):50 pF逻辑集成电路类型:AND GATE
最大I(ol):0.032 A湿度敏感等级:1
功能数量:1输入次数:2
端子数量:5最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:VSOF封装等效代码:FL5/6,.047,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE
包装方法:TR峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):0.01 mA
Prop。Delay @ Nom-Sup:5.5 ns传播延迟(tpd):12.7 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:0.6 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:FLAT端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:1.2 mmBase Number Matches:1

NL17SZ08XV5T2G 数据手册

 浏览型号NL17SZ08XV5T2G的Datasheet PDF文件第2页浏览型号NL17SZ08XV5T2G的Datasheet PDF文件第3页浏览型号NL17SZ08XV5T2G的Datasheet PDF文件第4页浏览型号NL17SZ08XV5T2G的Datasheet PDF文件第5页浏览型号NL17SZ08XV5T2G的Datasheet PDF文件第6页 
NL17SZ08  
Single 2−Input AND Gate  
The NL17SZ08 is a single 2input AND Gate in two tiny footprint  
packages. The device performs much as LCX multigate products in  
speed and drive. They should be used wherever the need for higher  
speed and drive are needed.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Features  
Tiny SOT353 and SOT553 Packages  
2.7 ns T at 5.0 V (typ)  
PD  
5
SC70/SC88A/SOT353  
DF SUFFIX  
Source/Sink 24 mA at 3.0 V  
L2 M G  
OverVoltage Tolerant Inputs  
G
5
CASE 419A  
Pin For Pin with NC7SZ08P5X, TC7SZ08FU and TC7SZ08AFE  
Chip Complexity: FETs = 20  
1
5
1
Designed for 1.65 V to 5.5 V V Operation  
PbFree Packages are Available  
CC  
SOT553  
XV5 SUFFIX  
CASE 463B  
L2 M G  
5
G
1
1
L2  
M
A
= Device Code  
= Date Code*  
= Assembly Location  
= Year  
= Work Week  
= PbFree Package  
5
IN B  
IN A  
V
CC  
1
2
Y
W
G
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may  
vary depending upon manufacturing location.  
4
OUT Y  
GND  
3
PIN ASSIGNMENT  
Figure 1. Pinout (Top View)  
Pin  
Function  
1
In B  
2
3
4
5
In A  
GND  
Out Y  
IN A  
IN B  
&
OUT Y  
V
CC  
Figure 2. Logic Symbol  
FUNCTION TABLE  
Output  
Input  
Y = AB  
A
L
B
L
Y
L
L
H
L
L
H
H
L
H
H
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
March, 2006 Rev. 7  
NL17SZ08/D  

NL17SZ08XV5T2G 替代型号

型号 品牌 替代类型 描述 数据表
NL17SZ08XV5T2 ONSEMI

类似代替

Single 2-Input AND Gate

与NL17SZ08XV5T2G相关器件

型号 品牌 获取价格 描述 数据表
NL17SZ08XV5T2G-L22087 ONSEMI

获取价格

Single 2-Input AND Gate
NL17SZ1 ONSEMI

获取价格

Single Non-Inverting Buffer with Schmitt Trigger
NL17SZ10 ONSEMI

获取价格

Single 3-Input NAND Gate
NL17SZ10DBVT1G ONSEMI

获取价格

Single 3-Input NAND Gate
NL17SZ10DFT2G ONSEMI

获取价格

Single 3-Input NAND Gate
NL17SZ10MU1TCG ONSEMI

获取价格

Single 3-Input NAND Gate
NL17SZ10MU3TCG ONSEMI

获取价格

Single 3-Input NAND Gate
NL17SZ11 ONSEMI

获取价格

Three-Input AND Gate
NL17SZ11DBVT1G ONSEMI

获取价格

Three-Input AND Gate
NL17SZ11DFT2G ONSEMI

获取价格

Three-Input AND Gate