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NE71300N PDF预览

NE71300N

更新时间: 2024-11-22 21:54:55
品牌 Logo 应用领域
日电电子 - NEC 晶体晶体管放大器
页数 文件大小 规格书
8页 94K
描述
LOW NOISE L TO K-BAND GaAs MESFET

NE71300N 技术参数

生命周期:Obsolete包装说明:DIE-6
Reach Compliance Code:unknown风险等级:5.68
Is Samacsys:N其他特性:LOW NOISE, HIGH RELIABILITY
配置:SINGLE最小漏源击穿电压:5 V
FET 技术:METAL SEMICONDUCTOR最高频带:K BAND
JESD-30 代码:R-XUUC-N3元件数量:1
端子数量:3工作模式:DEPLETION MODE
封装主体材料:UNSPECIFIED封装形状:RECTANGULAR
封装形式:UNCASED CHIP极性/信道类型:N-CHANNEL
最小功率增益 (Gp):8.5 dB认证状态:Not Qualified
表面贴装:YES端子形式:NO LEAD
端子位置:UPPER晶体管应用:AMPLIFIER
晶体管元件材料:GALLIUM ARSENIDEBase Number Matches:1

NE71300N 数据手册

 浏览型号NE71300N的Datasheet PDF文件第2页浏览型号NE71300N的Datasheet PDF文件第3页浏览型号NE71300N的Datasheet PDF文件第4页浏览型号NE71300N的Datasheet PDF文件第5页浏览型号NE71300N的Datasheet PDF文件第6页浏览型号NE71300N的Datasheet PDF文件第7页 
LOW NOISE  
L TO K-BAND GaAs MESFET  
NE71300  
NOISE FIGURE & ASSOCIATED GAIN  
FEATURES  
vs. FREQUENCY  
VDS = 3 V, IDS = 10 mA  
LOW NOISE FIGURE  
3
2.5  
2
24  
21  
18  
NF = 1.6 dB TYP at f = 12 GHz  
HIGH ASSOCIATED GAIN  
GA = 9.5 dB TYP at f = 12 GHz  
LG = 0.3 µm, WG = 280 µm  
EPITAXIAL TECHNOLOGY  
LOW PHASE NOISE  
GA  
1.5  
15  
1
0.5  
0
12  
9
NF  
DESCRIPTION  
The NE71300 features a low noise figure and high associ-  
atedgainthroughK-bandbyemployingarecessed0.3micron  
gate and triple epitaxial technology. The active area of the  
chip is covered with Si02 and Si3N4 for scratch protection as  
well as surface stability. This device is suitable for both  
amplifier and oscillator applications in the consumer and  
industrial markets.  
6
1
2
10  
20 30  
Frequency, f (GHz)  
NEC's stringent quality assurance and test procedures en-  
sure the highest reliability and performance.  
ELECTRICAL CHARACTERISTICS (TA = 25°C)  
PART NUMBER  
NE71300  
PACKAGE OUTLINE  
00 (CHIP)  
SYMBOLS  
PARAMETERS AND CONDITIONS  
UNITS  
MIN  
TYP  
MAX  
1
NFOPT  
Optimum Noise Figure, VDS = 3 V, IDS = 10 mA,  
f = 4 GHz  
f = 12 GHz  
dB  
dB  
0.6  
1.6  
0.7  
1.8  
1
GA  
Associated Gain, VDS = 3 V, IDS = 10 mA,  
f = 4 GHz  
f = 12 GHz  
dB  
dB  
11.5  
8.5  
14.0  
9.5  
P1dB  
Output Power at 1 dB Compression, VDS = 3 V, IDs = 30 mA,  
f =12 GHz  
dBm  
14.5  
IDSS  
VP  
Saturated Drain Current, VDS = 3 V, VGS = 0  
Pinch-Off Voltage, VDS = 3 V, IDS = 0.1 mA  
Transconductance, VDS = 3 V, IDS = 10 mA  
Gate to Source Leakage Current at VGS = -5 V  
Thermal Resistance (Channel to Case)  
mA  
V
20  
-3.5  
20  
40  
-1.1  
50  
120  
-0.5  
gm  
mS  
µA  
IGSO  
1.0  
10  
2
RTH (CH-C)  
°C/W  
190  
Notes:  
1. RF performance is determined by packaging and testing 10 samples per wafer; wafer rejection criteria for standard devices is 2 rejects for 10  
samples.  
2. Chip mounted on infinite heat sink.  
California Eastern Laboratories  

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