Datasheet > NB3N65027DTG

NB3N65027DTG

更新时间： 2024-01-12 20:57:53

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
7页	176K
描述
3.3V Programmable 3-PLL Clock Synthesizer

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NB3N65027DTG 数据手册

NB3N65027

3.3V Programmable 3-PLL Clock

Synthesizer with

6 LVTTL/LVCMOS Outputs w/OE

The NB3N65027 is a LVCMOS PLL−synthesized clock generator.

It accepts a 10 MHz to 27 MHz clock or fundamental mode crystal as

the reference source and drives three independent, low noise

phase−locked loops (PLLs).

Control lines ACSx, BCSx and CCS will select their appropriate

bank output frequencies. ACS1 and BCS1 are two−level

LVTTL/LVCMOS inputs, High and Low. ACS0, BCS0 and CCS are

three−level LVCMOS inputs, High, Mid and Low.

The NB3N65027 has three independent LVTTL/LVCMOS output

banks of two outputs each. Banks A and B offer a 1X and a 1/2X

output. Using a 25 MHz crystal, the selectable output frequencies

range from 16 2/3 MHz to 133 1/3 MHz. A 12.5 MHz crystal offers

from 8 1/3 MHz to 66 2/3 MHz. In addition, the NB3N65027 will

generate a buffered reference LVTTL/LVCMOS output, REFOUT,

10 MHz to 27 MHz. See Tables 2 through 9 for the variety of available

output frequencies. The OE pin, when set LOW, will disable the output

drivers to high impedance.

http://onsemi.com

MARKING DIAGRAM

3N65027

AWLYWWG

QSOP20

CASE 492AC

3N65027 = Specific Device Code

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

The NB3N65027 operates from a single +3.3 V supply across the

operating temperature range from −40°C to +85°C, and is offered in a

QSOP−20 RoHS compliant package.

The NB3N65027 provides the optimum combination of low cost,

flexibility, and high performance for Network, PCI and SDRAM

applications.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

Features

• 12.5 MHz or 25 MHz Fundamental Crystal or Clock

Input

• Operating Range: V = 3.3 V 10%

• QSOP−20 Package, 150 mil

• Six Output Clocks with Selectable Frequencies

• Buffered Crystal Reference Output

• SDRAM Frequencies of 67, 83, 100, and 133 MHz

• LVCMOS with 25 mA Output Drive Capability at TTL

Levels

• −40°C to +85°C Ambient Operating Temperature

• These Devices are Pb−Free and are RoHS Compliant

VDD

PLLA

PLLB

PLLC

CLKA1

CLKA2

CLKB1

CLKB2

CLKC1

ACS1

ACS0

BCS1

BCS0

CCS

Clock

CLKC2

Synthesis

and Control

Circuitry

X1/ICLK

Buffer /

Oscillator

25 or 12.5 MHz

crystal or clock

REFOUT

LX1

LX2

GND

OE (all outputs)

Figure 1. Simplified Logic Diagram

Publication Order Number:

June, 2011 − Rev. 2

NB3N65027/D

12 3 4 5 6 7

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NB3N65027DTG 替代型号

型号	品牌	替代类型	描述	数据表
NB3N65027DTR2G	ONSEMI	完全替代	3.3V Programmable 3-PLL Clock Synthesizer
650R-07LFT	IDT	功能相似	NETWORKING CLOCK SOURCE
650R-07LF	IDT	功能相似	NETWORKING CLOCK SOURCE

与NB3N65027DTG相关器件

型号	品牌	获取价格	描述	数据表
NB3N65027DTR2G	ONSEMI	获取价格	3.3V Programmable 3-PLL Clock Synthesizer
NB3N853501E	ONSEMI	获取价格	Differential Clock Fanout Buffer Outputs
NB3N853501EDTG	ONSEMI	获取价格	Differential Clock Fanout Buffer Outputs
NB3N853501EDTR2G	ONSEMI	获取价格	Differential Clock Fanout Buffer Outputs
NB3N853531E	ONSEMI	获取价格	3.3 V Xtal or LVTTL/LVCMOS Input 2:1 MUX to 1:4 LVPECL Fanout Buffer
NB3N853531EDTG	ONSEMI	获取价格	3.3 V Xtal or LVTTL/LVCMOS Input 2:1 MUX to 1:4 LVPECL Fanout Buffer
NB3N853531EDTR2G	ONSEMI	获取价格	3.3 V Xtal or LVTTL/LVCMOS Input 2:1 MUX to 1:4 LVPECL Fanout Buffer
NB3RL02	ONSEMI	获取价格	Low Phase-Noise Two-Channel Clock Fanout Buffer
NB3RL02FCT2G	ONSEMI	获取价格	Low Phase-Noise Two-Channel Clock Fanout Buffer
NB3U1548C	ONSEMI	获取价格	Skew Over Voltage Tolerant Fanout Buffer

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