Datasheet > NB3V1104C

NB3V1104C

更新时间： 2024-11-27 00:49:59

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
13页	332K
描述
LVCMOS Low Skew Fanout Buffer Family

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NB3V1104C 数据手册

NB3V110xC Series

3.3V/2.5V/1.8V LVCMOS

Low Skew Fanout Buffer

Family

Description

www.onsemi.com

The NB3V110xC are a modular, high−performance, low−skew,

general purpose LVCMOS clock buffer family. The family of devices

is designed with a modular approach. Four different fan−out

variations, 1:2, 1:3, 1:4, 1:6 and 1:8, are available. All of the devices

are pin compatible to each other for easy handling. All family

members share the same high performing characteristics like low

additive jitter, low skew, and wide operating temperature range. The

NB3V110xC supports an asynchronous output enable control (OE)

which switches the outputs into a low state when OE is low. The

NB3V110xC devices operate in a 3.3 V, 2.5 V and 1.8 V environment

and are characterized for operation from −40°C to 105°C.

TSSOP−8

DT SUFFIX

CASE 948S

TSSOP−14

DT SUFFIX

CASE 948G

TSSOP−16

DT SUFFIX

CASE 948F

WDFN8, 2x2

MT SUFFIX

CASE 511AT

Features

• Operating Temperature Range: –40°C to 105°C

• High−Performance 1:2, 1:3, 1:4, 1:6, 1:8 LVCMOS Clock Buffer

• Available in 8−, 14−, 16−Pin TSSOP and WDFN8 Packages

• Very Low Output−to−Output Skew < 50 ps

• Very Low Additive Jitter < 200 fs

MARKING DIAGRAMS

1108

1106

10x

YWW

ALYWG

• Supply Voltage: 3.3 V, 2.5 V or 1.8 V

• f

= 250 MHz for 3.3 V; f

= 133 MHz for 1.8 V

= 180 MHz for 2.5 V;

max

• These Devices are Pb−Free and are RoHS Compliant

TSSOP−8

TSSOP−14

TSSOP−16

BLOCK DIAGRAM

0X MG

CMOS

CLKIN

CMOS

WDFN8

= Assembly Location

= Date Code

= Wafer Lot

CMOS

= Year

CMOS

W, WW = Work Week

= Pb−Free Package

(Note: Microdot may be in either location)

CMOS

ORDERING INFORMATION

See detailed ordering, marking and shipping information on

page 9 of this data sheet.

Publication Order Number:

January, 2017 − Rev. 3

NB3V1102C/D

12 3 4 5 6 7...13

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