Datasheet > NB3RL02FCT2G

NB3RL02FCT2G

更新时间： 2024-11-24 01:23:51

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
8页	99K
描述
Low Phase-Noise Two-Channel Clock Fanout Buffer

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

NB3RL02FCT2G 数据手册

NB3RL02

Low Phase-Noise

Two-Channel Clock Fanout

Buffer

The NB3RL02 is a low−skew, low jitter 1:2 clock fan−out buffer,

ideal for use in portable end−equipment, such as mobile phones. With

integrated LDO and output control circuitry.

www.onsemi.com

The MCLK_IN pin has an AC coupling capacitor and will directly

accept a square or sine wave clock input, such as a temperature

compensated crystal oscillator (TCXO). The minimum acceptable

input amplitude of the sine wave is 300 mV peak−to−peak.

The two clock outputs are enabled by control inputs CLK_REQ1

and CLK_REQ2.

MARKING

DIAGRAMS

WLCSP8

CASE 499BQ

RLYYWW

The NB3RL02 has an integrated Low−Drop−Out (LDO) voltage

regulator which accepts input voltages from 2.3 V to 5.5 V and outputs

1.8 V at I = 50 mA. This 1.8 V supply is externally available to

out

= Specific Device Code

= Year

= Work Week

provide regulated power to peripheral devices, such as a TCXO.

The adaptive clock output buffers offer controlled slew−rate over a

wide capacitive loading range which minimizes EMI emissions,

maintains signal integrity, and minimizes ringing caused by signal

reflections on the clock distribution lines.

= Pb−Free Package

The NB3RL02 is offered in a 0.4 mm pitch wafer−level−chip−scale

(WLCS) package and is optimized for very low standby current

consumption.

LOGIC DIAGRAM

Features

• Low Additive Noise:

♦ −149 dBc/Hz at 10 kHz Offset Phase Noise

♦ 0.37 ps (rms) Output Jitter

• Limited Output Slew Rate for EMI Reduction

(1 ns to 5 ns/Rise/Fall Time for 10−50 pF Loads)

• Regulated 1.8 V Output Supply Available for External Clock Source,

ie. TCX0

• Ultra−Small Package:

♦ 8−ball: 0.4 mm Pitch WLCS

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 7 of this data sheet.

• ESD Performance Exceeds JESD 22

♦ 2000 V Human−Body Model (A114−A)

♦ 200 V Machine Model (A115−A)

♦ 1000 V Charged−Device Model (JESD22−C101−A Level III)

• These are Pb−Free Devices

Applications

• Cellular Phones

• Global Positioning Systems (GPS)

Publication Order Number:

September, 2015 − Rev. 3

NB3RL02/D

12 3 4 5 6 7 8

中文翻译

下载PDF

与NB3RL02FCT2G相关器件

型号	品牌	获取价格	描述	数据表
NB3U1548C	ONSEMI	获取价格	Skew Over Voltage Tolerant Fanout Buffer
NB3U1548C_17	ONSEMI	获取价格	Skew Over Voltage Tolerant Fanout Buffer
NB3U1548CDG	ONSEMI	获取价格	Skew Over Voltage Tolerant Fanout Buffer
NB3U1548CDR2G	ONSEMI	获取价格	Skew Over Voltage Tolerant Fanout Buffer
NB3U1548CDTR2G	ONSEMI	获取价格	Skew Over Voltage Tolerant Fanout Buffer
NB3U23C	ONSEMI	获取价格	1.2 V Dual Channel CMOS Buffer / Translator
NB3U23C_14	ONSEMI	获取价格	1.2 V Dual Channel CMOS Buffer / Translator
NB3U23CMNTAG	ONSEMI	获取价格	1.2 V Dual Channel CMOS Buffer / Translator
NB3U23CMNTBG	ONSEMI	获取价格	1.2 V Dual Channel CMOS Buffer / Translator
NB3U23CSQTCG	ONSEMI	获取价格	1.2 V Dual Channel CMOS Buffer / Translator

与NB3RL02FCT2G相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

35
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

27
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

55
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

52

产品中心

服务支持

精选活动

关于我们

帮助中心

NB3RL02FCT2G

NB3RL02FCT2G 数据手册

与NB3RL02FCT2G相关器件

与NB3RL02FCT2G相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

NB3RL02FCT2G

NB3RL02FCT2G 数据手册

与NB3RL02FCT2G相关器件

与NB3RL02FCT2G相关文章

您还可以找

您在本页遇到什么问题？