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MTD6P10E-T4 PDF预览

MTD6P10E-T4

更新时间： 2024-09-12 21:15:35
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 开关脉冲晶体管
页数 文件大小 规格书
10页 261K
描述
6A, 100V, 0.66ohm, P-CHANNEL, Si, POWER, MOSFET

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MTD6P10E-T4 技术参数

生命周期：Obsolete包装说明：SMALL OUTLINE, R-PSSO-G2
Reach Compliance Code：unknown风险等级：5.15
雪崩能效等级（Eas）：180 mJ外壳连接：DRAIN
配置：SINGLE WITH BUILT-IN DIODE最小漏源击穿电压：100 V
最大漏极电流 (ID)：6 A最大漏源导通电阻：0.66 Ω
FET 技术：METAL-OXIDE SEMICONDUCTORJESD-30 代码：R-PSSO-G2
元件数量：1端子数量：2
工作模式：ENHANCEMENT MODE封装主体材料：PLASTIC/EPOXY
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
极性/信道类型：P-CHANNEL最大脉冲漏极电流 (IDM)：18 A
认证状态：Not Qualified表面贴装：YES
端子面层：NOT SPECIFIED端子形式：GULL WING
端子位置：SINGLE晶体管应用：SWITCHING
晶体管元件材料：SILICONBase Number Matches：1

MTD6P10E-T4 数据手册

 浏览型号MTD6P10E-T4的Datasheet PDF文件第2页浏览型号MTD6P10E-T4的Datasheet PDF文件第3页浏览型号MTD6P10E-T4的Datasheet PDF文件第4页浏览型号MTD6P10E-T4的Datasheet PDF文件第5页浏览型号MTD6P10E-T4的Datasheet PDF文件第6页浏览型号MTD6P10E-T4的Datasheet PDF文件第7页 
Order this document  
by MTD6P10E/D  
SEMICONDUCTOR TECHNICAL DATA  
Motorola Preferred Device  
TMOS POWER FET  
6.0 AMPERES  
100 VOLTS  
P–Channel Enhancement–Mode Silicon Gate  
This advanced TMOS E–FET is designed to withstand high  
energy in the avalanche and commutation modes. The new energy  
efficient design also offers a drain–to–source diode with a fast  
recovery time. Designed for low voltage, high speed switching  
applications in power supplies, converters and PWM motor  
controls, these devices are particularly well suited for bridge circuits  
where diode speed and commutating safe operating areas are  
critical and offer additional safety margin against unexpected  
voltage transients.  
R
= 0.66 OHM  
DS(on)  
CASE 369A–13, Style 2  
DPAK  
•
•
Avalanche Energy Specified  
Source–to–Drain Diode Recovery Time Comparable to a  
Discrete Fast Recovery Diode  
D
•
•
•
Diode is Characterized for Use in Bridge Circuits  
I
and V Specified at Elevated Temperature  
DSS  
DS(on)  
Surface Mount Package Available in 16 mm, 13–inch/2500  
Unit Tape & Reel, Add –T4 Suffix to Part Number  
G
S
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
C
Rating  
Symbol  
Value  
Unit  
Drain–to–Source Voltage  
V
DSS  
100  
Vdc  
Drain–to–Gate Voltage (R  
GS  
= 1.0 MΩ)  
V
DGR  
100  
Vdc  
Gate–to–Source Voltage — Continuous  
— Non–repetitive (t ≤ 10 ms)  
V
± 15  
± 20  
Vdc  
Vpk  
GS  
V
GSM  
p
Drain Current — Continuous  
— Continuous @ 100°C  
— Single Pulse (t ≤ 10 µs)  
I
I
6.0  
3.9  
18  
Adc  
Apk  
D
D
I
p
DM  
Total Power Dissipation  
Derate above 25°C  
Total Power Dissipation @ T = 25°C, when mounted to minimum recommended pad size  
P
D
50  
0.4  
1.75  
Watts  
W/°C  
Watts  
A
Operating and Storage Temperature Range  
T , T  
stg  
–55 to 150  
180  
°C  
J
Single Pulse Drain–to–Source Avalanche Energy — Starting T = 25°C  
E
AS  
mJ  
J
(V  
DD  
= 25 Vdc, V = 10 Vdc, I = 6.0 Apk, L = 10 mH, R = 25 Ω)  
GS L G  
Thermal Resistance — Junction to Case  
— Junction to Ambient  
R
θJC  
R
θJA  
R
θJA  
2.50  
100  
71.4  
°C/W  
— Junction to Ambient, when mounted to minimum recommended pad size  
Maximum Temperature for Soldering Purposes, 1/8″ from case for 10 seconds  
T
L
260  
°C  
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit  
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.  
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.  
Thermal Clad is a trademark of the Bergquist Company.  
Preferred devices are Motorola recommended choices for future use and best overall value.  
Motorola, Inc. 1995  
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