Datasheet > MSC8157TVT1000A

MSC8157TVT1000A

更新时间： 2024-11-29 21:02:47

品牌	Logo	应用领域
恩智浦 - NXP		时钟 PC 双倍数据速率外围集成电路
页数	文件大小	规格书
95页	506K
描述
StarCore DSP, 6x 1GHz SC3850 cores, MAPLE-B2 accelerator, DDR2/3, SRIO, PCIe, CIPRI, GbE, -40-105C

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MSC8157TVT1000A 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	29 X 29 MM, LEAD FREE, PLASTIC, FCBGA-783	针数：	783
Reach Compliance Code：	not_compliant	ECCN代码：	3A991.A.2
HTS代码：	8542.31.00.01	风险等级：	5.62
地址总线宽度：		桶式移位器：	NO
位大小：	32	边界扫描：	YES
最大时钟频率：	667 MHz	外部数据总线宽度：
格式：	FLOATING POINT	内部总线架构：	SINGLE
JESD-30 代码：	S-PBGA-B783	长度：	29 mm
低功率模式：	YES	湿度敏感等级：	3
端子数量：	783	最高工作温度：	105 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装等效代码：	BGA783,28X28,40
封装形状：	SQUARE	封装形式：	GRID ARRAY
峰值回流温度（摄氏度）：	245	电源：	1,1.5,2.5 V
认证状态：	Not Qualified	座面最大高度：	3.94 mm
子类别：	Digital Signal Processors	最大供电电压：	1.05 V
最小供电电压：	0.97 V	标称供电电压：	1 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Silver/Copper - with Nickel barrier
端子形式：	BALL	端子节距：	1 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	30
宽度：	29 mm	uPs/uCs/外围集成电路类型：	DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches：	1

MSC8157TVT1000A 数据手册

Freescale Semiconductor

Data Sheet: Technical Data

Document Number: MSC8157

Rev. 3, 12/2013

MSC8157

MSC8157 Six-Core Digital

Signal Processor

FC-PBGA–783

29 mm x 29 mm

• Six StarCore SC3850 DSP subsystems, each with an

SC3850 DSP core, 32 KB L1 instruction cache, 32 KB L1

data cache, unified 512 KB L2 cache configurable as M2

memory in 64 KB increments, memory management unit

(MMU), extended programmable interrupt controller

(EPIC), two general-purpose 32-bit timers, debug and

profiling support, low-power Wait, Stop, and power-down

processing modes, and ECC/EDC support.

• Chip-level arbitration and switching system (CLASS) that

provides full fabric non-blocking arbitration between the

cores and other initiators and the M2 memory, shared M3

memory, DDR SRAM controller, device configuration

control and status registers, MAPLE-B, and other targets.

• 3072 KB 128-bit wide M3 memory, 2048 KBs of which

can be turned off to save power.

• High-speed serial interface with a 10-lane SerDes PHY that

supports two Serial RapidIO interfaces, one PCI Express

interface, six CPRI lanes, and two SGMII interfaces

(multiplexed). The Serial RapidIO interfaces support

x1/x2/x4 operation up to 5 Gbaud with an enhanced

messaging unit (eMSG) and two DMA units. The PCI

Express controller supports 32- and 64-bit addressing,

x1/x2/x4 link. The six CPRI controllers can support six

lanes up to 6.144 Gbaud.

• QUICC Engine technology subsystem with dual RISC

processors, 48 KB multi-master RAM, 48 KB instruction

RAM, supporting two communication controllers for two

Gigabit Ethernet interfaces (RGMII or SGMII), to offload

scheduling tasks from the DSP cores, and an SPI.

• I/O Interrupt Concentrator consolidates all chip maskable

interrupt and non-maskable interrupt sources and routes

then to INT_OUT/CP_TX_INT, NMI_OUT/CP_RX_INT,

and the cores.

• 96 KB boot ROM.

• Three input clocks (one global and two differential).

• Six PLLs (three global, two Serial RapidIO, one DDR

PLLs).

• UART that permits full-duplex operation with a bit rate of

up to 6.25 Mbps.

• Second generation Multi-Accelerator Platform Engine for

Baseband (MAPLE-B2) with a second generation

programmable system interface (PSIF2); Turbo encoding

and decoding; Viterbi decoding; FFT/iFFT and DFT/iDFT

processing; downlink chip rate processing; CRC

processing and insertion; equalization processing and

matrix inversion; uplink batch and fast processing. Some

MAPLE-B2 processors can be disabled when not required

to reduce overall power consumption.

• One DDR controllers with up to a 667 MHz clock (1333

MHz data rate), 64/32 bit data bus, supporting up to a total

2 Gbyte in up to four banks (two per controller) and support

for DDR3.

• Two general-purpose 32-bit timers for RTOS support per

SC3850 core, four timer modules with four 16-bit fully

programmable timers, two timer modules with four 32-bit

fully programmable timers; and eight software watchdog

timers (SWT).

• Eight programmable hardware semaphores.

• Up to 32 virtual interrupts and a virtual NMI asserted by

simple write access.

• I C interface.

• Up to 32 GPIO ports, sixteen of which can be configured as

external interrupts.

• Boot interface options include Ethernet, Serial RapidIO

• DMA controller with 32 unidirectional channels

supporting 16 memory-to-memory channels with up to

1024 buffer descriptors per channel, and programmable

priority, buffer, and multiplexing configuration. It is

optimized for DDR SDRAM.

interface, I C, and SPI.

• Supports IEEE Std. 1149.6 JTAG interface

• Low power CMOS design, with low-power standby and

power-down modes, and optimized power-management

circuitry.

• 45 nm SOI CMOS technology.

Freescale reserves the right to change the detail specifications as may be required

to permit improvements in the design of its products.

12 3 4 5 6 7...95

中文翻译

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MSC8157TVT1000A 替代型号

型号	品牌	替代类型	描述	数据表
MSC8157TAG1000A	NXP	完全替代	OTHER DSP

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MSC82001	STMICROELECTRONICS	获取价格	RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS
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MSC82003	ASI	获取价格	NPN SILICON RF POWER TRANSISTOR
MSC82005	ASI	获取价格	NPN SILICON RF POWER TRANSISTOR
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MSC82010	STMICROELECTRONICS	获取价格	RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS
MSC82040	STMICROELECTRONICS	获取价格	RF & MICROWAVE TRANSISTORS GENERAL PURPOSE LINEAR APPLICATIONS
MSC82100	STMICROELECTRONICS	获取价格	RF & MICROWAVE TRANSISTORS GENERAL PURPOSE LINEAR APPLICATIONS
MSC82302	STMICROELECTRONICS	获取价格	RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS
MSC82304	STMICROELECTRONICS	获取价格	RF & MICROWAVE TRANSISTORS GENERAL PURPOSE AMPLIFIER APPLICATIONS

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