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MM74HCT74MX_NL PDF预览

MM74HCT74MX_NL

更新时间: 2024-11-11 19:53:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
10页 334K
描述
D Flip-Flop, HCT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14, 0.150 INCH, LEAD FREE, MS-012, LEAD FREE, SOIC-14

MM74HCT74MX_NL 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.11系列:HCT
JESD-30 代码:R-PDSO-G14JESD-609代码:e3/e4
长度:8.6235 mm逻辑集成电路类型:D FLIP-FLOP
位数:1功能数量:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):44 ns认证状态:Not Qualified
座面最大高度:1.753 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN/NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:50 MHz
Base Number Matches:1

MM74HCT74MX_NL 数据手册

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March 2008  
MM74HCT74  
Dual D-Type Flip-Flop with Preset and Clear  
Features  
General Description  
Typical propagation delay: 20ns  
The MM74HCT74 utilizes advanced silicon-gate CMOS  
technology to achieve operation speeds similar to the  
equivalent LS-TTL part. It possesses the high noise  
immunity and low power consumption of standard  
CMOS integrated circuits, along with the ability to drive  
10 LS-TTL loads.  
Low quiescent current: 40µA maximum (74HCT Series)  
Low input current: 1µA maximum  
Fanout of 10 LS-TTL loads  
Meta-stable hardened  
This flip-flop has independent data, preset, clear, and  
clock inputs and Q and Q outputs. The logic level  
present at the data input is transferred to the output  
during the positive-going transition of the clock pulse.  
Preset and clear are independent of the clock and  
accomplished by a low level at the appropriate input.  
The 74HCT logic family is functionally and pin-out  
compatible with the standard 74LS logic family. All inputs  
are protected from damage due to static discharge by  
internal diode clamps to V and ground.  
CC  
MM74HCT devices are intended to interface between  
TTL and NMOS components and standard CMOS  
devices. These parts are also plug-in replacements for  
LS-TTL devices and can be used to reduce power  
consumption in existing designs.  
Ordering Information  
Package  
Order Number  
MM74HCT74M  
Number  
Package Description  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MM74HCT74SJ  
MM74HCT74MTC  
M14D  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
MM74HCT74N  
N14A  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
©1984 Fairchild Semiconductor Corporation  
MM74HCT74 Rev. 1.4.0  
www.fairchildsemi.com  

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