MM74HCT74N_NL

更新时间： 2024-01-06 09:53:12

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		触发器
页数	文件大小	规格书
8页	90K
描述
Dual D-Type Flip-Flop with Preset and Clear

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中文翻译

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技术参数
数据手册

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MM74HCT74N_NL 技术参数

生命周期：	Active	包装说明：	SOP,
Reach Compliance Code：	compliant	风险等级：	5.64
系列：	HCT	JESD-30 代码：	R-PDSO-G14
逻辑集成电路类型：	D FLIP-FLOP	位数：	1
功能数量：	2	端子数量：	14
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出极性：	COMPLEMENTARY	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	传播延迟（tpd）：	44 ns
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子位置：	DUAL
触发器类型：	POSITIVE EDGE	最小 fmax：	50 MHz
Base Number Matches：	1

MM74HCT74N_NL 数据手册

February 1984

Revised January 2005

MM74HCT74

Dual D-Type Flip-Flop with Preset and Clear

General Description

Features

The MM74HCT74 utilizes advanced silicon-gate CMOS

technology to achieve operation speeds similar to the

equivalent LS-TTL part. It possesses the high noise immu-

nity and low power consumption of standard CMOS inte-

grated circuits, along with the ability to drive 10 LS-TTL

loads.

■ Typical propagation delay: 20 ns

■ Low quiescent current: 40 µA maximum (74HCT Series)

■ Low input current: 1 µA maximum

■ Fanout of 10 LS-TTL loads

■ Meta-stable hardened

This flip-flop has independent data, preset, clear, and clock

inputs and Q and Q outputs. The logic level present at the

data input is transferred to the output during the positive-

going transition of the clock pulse. Preset and clear are

independent of the clock and accomplished by a low level

at the appropriate input.

The 74HCT logic family is functionally and pin-out compati-

ble with the standard 74LS logic family. All inputs are pro-

tected from damage due to static discharge by internal

diode clamps to V_CCand ground.

MM74HCT devices are intended to interface between TTL

and NMOS components and standard CMOS devices.

These parts are also plug-in replacements for LS-TTL

devices and can be used to reduce power consumption in

existing designs.

Ordering Code:

Package

Order Number

Package Description

Number

MM74HCT74M

MM74HCT74SJ

M74HCT74MTC

MM74HCT74N

MM74HCT74N_NL

M14A

M14D

MTC14

N14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

N14A

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

DS005360

www.fairchildsemi.com

12 3 4 5 6 7 8

中文翻译

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与MM74HCT74N_NL相关器件

型号	品牌	获取价格	描述	数据表
MM74HCT74SJ	FAIRCHILD	获取价格	Dual D-Type Flip-Flop with Preset and Clear
MM74HCT74SJ	ONSEMI	获取价格	FF/Latch
MM74HCT74SJX	FAIRCHILD	获取价格	D Flip-Flop, HCT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMO
MM74HCT74SJX	ONSEMI	获取价格	FF/Latch
MM74HCT76	NSC	获取价格	Dual J-K Flip-Flops with Preset and Clear
MM74HCT76J	NSC	获取价格	IC HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, D
MM74HCT76J/A+	TI	获取价格	IC,FLIP-FLOP,DUAL,J/K TYPE,HCT-CMOS,DIP,16PIN,CERAMIC
MM74HCT76N	TI	获取价格	IC HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16, D
MM74HCU04	FAIRCHILD	获取价格	Hex Inverter
MM74HCU04_05	FAIRCHILD	获取价格	Hex Inverter

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