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MM74HC4040SJX_NL PDF预览

MM74HC4040SJX_NL

更新时间： 2024-11-26 13:11:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器
页数 文件大小 规格书
9页 113K
描述
Binary Counter, HC/UH Series, Asynchronous, Negative Edge Triggered, 12-Bit, Up Direction, CMOS, PDSO16, 5.30 MM, EIAJ TYPE2, SOP-16

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MM74HC4040SJX_NL 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP16,.3
针数：16Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.39
计数方向：UP系列：HC/UH
JESD-30 代码：R-PDSO-G16JESD-609代码：e3
长度：10.2 mm负载电容（CL）：50 pF
负载/预设输入：YES逻辑集成电路类型：BINARY COUNTER
最大频率@ Nom-Sup：24000000 Hz最大I（ol）：0.004 A
工作模式：ASYNCHRONOUS湿度敏感等级：1
位数：12功能数量：1
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：2/6 V传播延迟（tpd）：265 ns
认证状态：Not Qualified座面最大高度：2.1 mm
子类别：Counters最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：4.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：NEGATIVE EDGE宽度：5.3 mm
最小 fmax：28 MHzBase Number Matches：1

MM74HC4040SJX_NL 数据手册

 浏览型号MM74HC4040SJX_NL的Datasheet PDF文件第2页浏览型号MM74HC4040SJX_NL的Datasheet PDF文件第3页浏览型号MM74HC4040SJX_NL的Datasheet PDF文件第4页浏览型号MM74HC4040SJX_NL的Datasheet PDF文件第5页浏览型号MM74HC4040SJX_NL的Datasheet PDF文件第6页浏览型号MM74HC4040SJX_NL的Datasheet PDF文件第7页 
February 1984  
Revised December 2003  
MM74HC4020 • MM74HC4040  
14-Stage Binary Counter • 12-Stage Binary Counter  
These devices are pin equivalent to the CD4020 and  
CD4040 respectively. All inputs are protected from damage  
due to static discharge by protection diodes to VCC and  
General Description  
The MM74HC4020, MM74HC4040, are high speed binary  
ripple carry counters. These counters are implemented uti-  
ground.  
lizing advanced silicon-gate CMOS technology to achieve  
speed performance similar to LS-TTL logic while retaining  
the low power and high noise immunity of CMOS.  
Features  
■ Typical propagation delay: 16 ns  
The MM74HC4020 is  
a 14 stage counter and the  
MM74HC4040 is a 12-stage counter. Both devices are  
incremented on the falling edge (negative transition) of the  
input clock, and all their outputs are reset to a low level by  
applying a logical high on their reset input.  
■ Wide operating voltage range: 2–6V  
■ Low input current: 1 µA maximum  
■ Low quiescent current: 80 µA maximum (74HC Series)  
■ Output drive capability: 10 LS-TTL loads  
Ordering Code:  
Order Number  
Package Number  
Package Description  
MM74HC4020M  
(Note 1)  
M16A  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
MM74HC4020SJ  
MM74HC4020N  
M16D  
N16E  
M16A  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
MM74HC4040M  
(Note 1)  
MM74HC4040SJ  
(Note 1)  
M16D  
MTC16  
N16E  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
MM74HC4040MTC  
(Note 1)  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
MM74HC4040N  
Note 1: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagrams  
MM74HC4040  
MM74HC4020  
© 2003 Fairchild Semiconductor Corporation  
DS005216  
www.fairchildsemi.com  
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