Datasheet > 信号电路 > 锁相环或频率合成电路> MM74HC4046SJX

MM74HC4046SJX

更新时间： 2024-09-13 22:21:15

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		信号电路锁相环或频率合成电路光电二极管
页数	文件大小	规格书
17页	252K
描述
CMOS Phase Lock Loop

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技术参数
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MM74HC4046SJX 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Transferred	零件包装代码：	SOIC
包装说明：	SOP, SOP16,.3	针数：	16
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.17	模拟集成电路 - 其他类型：	PHASE LOCKED LOOP
JESD-30 代码：	R-PDSO-G16	JESD-609代码：	e3
长度：	10.1 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	16
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP16,.3	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
电源：	2/6 V	认证状态：	Not Qualified
座面最大高度：	2.1 mm	子类别：	PLL or Frequency Synthesis Circuits
最大供电电压 (Vsup)：	6 V	最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	MATTE TIN	端子形式：	GULL WING
端子节距：	1.27 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	5.3 mm
Base Number Matches：	1

MM74HC4046SJX 数据手册

February 1984

Revised October 2003

MM74HC4046

CMOS Phase Lock Loop

them. This comparator is more susceptible to noise throw-

ing the loop out of lock, but is less likely to lock onto har-

monics than the other two comparators.

General Description

The MM74HC4046 is a low power phase lock loop utilizing

advanced silicon-gate CMOS technology to obtain high fre-

quency operation both in the phase comparator and VCO

sections. This device contains a low power linear voltage

controlled oscillator (VCO), a source follower, and three

phase comparators. The three phase comparators have a

common signal input and a common comparator input. The

signal input has a self biasing amplifier allowing signals to

be either capacitively coupled to the phase comparators

with a small signal or directly coupled with standard input

logic levels. This device is similar to the CD4046 except

that the Zener diode of the metal gate CMOS device has

been replaced with a third phase comparator.

In a typical application any one of the three comparators

feed an external filter network which in turn feeds the VCO

input. This input is a very high impedance CMOS input

which also drives the source follower. The VCO’s operating

frequency is set by three external components connected

to the C1A, C1B, R1 and R2 pins. An inhibit pin is provided

to disable the VCO and the source follower, providing a

method of putting the IC in a low power state.

The source follower is a MOS transistor whose gate is con-

nected to the VCO input and whose drain connects the

Demodulator output. This output normally is used by tying

a resistor from pin 10 to ground, and provides a means of

looking at the VCO input without loading down modifying

the characteristics of the PLL filter.

Phase Comparator I is an exclusive OR (XOR) gate. It pro-

vides a digital error signal that maintains a 90 phase shift

between the VCO’s center frequency and the input signal

(50% duty cycle input waveforms). This phase detector is

more susceptible to locking onto harmonics of the input fre-

quency than phase comparator I, but provides better noise

rejection.

Features

■ Low dynamic power consumption: (V_CC= 4.5V)

■ Maximum VCO operating frequency:

12 MHz (V_CC= 4.5V)

Phase comparator III is an SR flip-flop gate. It can be used

to provide the phase comparator functions and is similar to

the first comparator in performance.

■ Fast comparator response time (V_CC= 4.5V)

Comparator I: 25 ns

Phase comparator II is an edge sensitive digital sequential

network. Two signal outputs are provided, a comparator

output and a phase pulse output. The comparator output is

a 3-STATE output that provides a signal that locks the VCO

output signal to the input signal with 0 phase shift between

Comparator II: 30 ns

Comparator III: 25 ns

■ VCO has high linearity and high temperature stability

Ordering Code:

Order Number

MM74HC4046M

MM74HC4046SJ

MM74HC4046MTC

MM74HC4046N

Package Number

M16A

Package Description

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

M16D

MTC16

N16E

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

DS005352

www.fairchildsemi.com

12 3 4 5 6 7...17

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与MM74HC4046SJX相关器件

型号	品牌	获取价格	描述	数据表
MM74HC4049	FAIRCHILD	获取价格	Hex Inverting Logic Level Down Converter . Hex Logic Level Down Converter
MM74HC4049CW	FAIRCHILD	获取价格	Inverter, HC/UH Series, 6-Func, 1-Input, CMOS, WAFER
MM74HC4049J	FAIRCHILD	获取价格	暂无描述
MM74HC4049J/A+	TI	获取价格	IC,LOGIC GATE,HEX INVERTER,HC-CMOS,DIP,16PIN,CERAMIC
MM74HC4049M	FAIRCHILD	获取价格	Hex Inverting Logic Level Down Converter . Hex Logic Level Down Converter
MM74HC4049M/A+	TI	获取价格	IC,LOGIC GATE,HEX INVERTER,HC-CMOS,SOP,16PIN,PLASTIC
MM74HC4049M_NL	FAIRCHILD	获取价格	暂无描述
MM74HC4049MTC	FAIRCHILD	获取价格	Hex Inverting Logic Level Down Converter . Hex Logic Level Down Converter
MM74HC4049MTCX	FAIRCHILD	获取价格	Hex Inverting Logic Level Down Converter . Hex Logic Level Down Converter
MM74HC4049MX	FAIRCHILD	获取价格	Hex Inverting Logic Level Down Converter . Hex Logic Level Down Converter

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