MM74HC193

更新时间： 2024-11-02 05:08:35

品牌	Logo	应用领域
美国国家半导体 - NSC		计数器
页数	文件大小	规格书
8页	170K
描述
Synchronous Decade Up/Down Counters Synchronous Binary Up/Down Counters

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MM74HC193 数据手册

January 1988

MM54HC192/MM74HC192

Synchronous Decade Up/Down Counters

MM54HC193/MM74HC193

Synchronous Binary Up/Down Counters

General Description

These high speed synchronous counters utilize advanced

silicon-gate CMOS technology to achieve the high noise im-

munity and low power consumption of CMOS technology,

along with the speeds of low power Schottky TTL. The

MM54HC192/MM74HC192 is a decade counter, and the

MM54HC193/MM74HC193 is a binary counter. Both coun-

ters have two separate clock inputs, an UP COUNT input

and a DOWN COUNT input. All outputs of the flip-flops are

simultaneously triggered on the low to high transition of ei-

ther clock while the other input is held high. The direction of

counting is determined by which input is clocked.

Both a BORROW and CARRY output are provided to en-

able cascading of both up and down counting functions. The

BORROW output produces a negative going pulse when the

counter underflows and the CARRY outputs a pulse when

the counter overflows. The counters can be cascaded by

connecting the CARRY and BORROW outputs of one de-

vice to the COUNT UP and COUNT DOWN inputs, respec-

tively, of the next device.

All inputs are protected from damage due to static dis-

charge by diodes to V

and ground.

These counters may be preset by entering the desired data

on the DATA A, DATA B, DATA C, and DATA D inputs.

When the LOAD input is taken low the data is loaded inde-

pendently of either clock input. This feature allows the count-

ers to be used as divide-by-n counters by modifying the

count length with the preset inputs.

Features

Typical propagation delay,

Count up to Q: 28 ns

Typical operating frequency: 27 MHz

Wide power supply range: 2–6V

Low quiescent supply current: 80 mA maximum

(74HC Series)

In addition both counters can also be cleared. This is ac-

complished by inputting a high on the CLEAR input. All 4

internal stages are set to a low level independently of either

COUNT input.

Low input current: 1 mA maximum

4 mA output drive

Connection Diagram

Truth Table

Count

Dual-In-Line Package

Clear

Load

Function

Down

Count Up

Count Down

Clear

Load

high level

low level

transition from low-to-high

don’t care

TL/F/5011–1

Order Number MM54HC192/193 or MM74HC192/193

1995 National Semiconductor Corporation

TL/F/5011

RRD-B30M115/Printed in U. S. A.

12 3 4 5 6 7 8

中文翻译

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与MM74HC193相关器件

型号	品牌	获取价格	描述	数据表
MM74HC193J	NSC	获取价格	暂无描述
MM74HC193J	TI	获取价格	HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, CDIP16, DIP-
MM74HC193J	FAIRCHILD	获取价格	Binary Counter, Synchronous, Bidirectional, CMOS, CDIP16,
MM74HC193J/A+	TI	获取价格	IC,COUNTER,UP/DOWN,4-BIT BINARY,HC-CMOS,DIP,16PIN,CERAMIC
MM74HC193N	NSC	获取价格	IC HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDIP16, D
MM74HC193N	TI	获取价格	HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDIP16, DIP-
MM74HC193N	FAIRCHILD	获取价格	Binary Counter, Synchronous, Bidirectional, CMOS, PDIP16,
MM74HC193N/A+	NSC	获取价格	暂无描述
MM74HC193N/B+	TI	获取价格	IC,COUNTER,UP/DOWN,4-BIT BINARY,HC-CMOS,DIP,16PIN,PLASTIC
MM74HC193WM	NSC	获取价格	IC,COUNTER,UP/DOWN,4-BIT BINARY,HC-CMOS,SOP,16PIN,PLASTIC

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