Datasheet > 存储 > SRAM> MCM69F817ZP7R

MCM69F817ZP7R

更新时间： 2024-09-18 22:06:43

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		/
页数	文件大小	规格书
16页	179K
描述
256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

MCM69F817ZP7R 技术参数

生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	BGA,	针数：	119
Reach Compliance Code：	unknown	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.84
Is Samacsys：	N	Base Number Matches：	1

MCM69F817ZP7R 数据手册

Order this document

by MCM69F817/D

SEMICONDUCTOR TECHNICAL DATA

MCM69F817

Product Preview

256K x 18 Bit Flow–Through

BurstRAM Synchronous

Fast Static RAM

The MCM69F817 is a 4M bit synchronous fast static RAM designed to provide

a burstable, high performance, secondary cache for the PowerPC and other

high performance microprocessors. It is organized as 256K words of 18 bits

each. This device integrates input registers, a 2–bit address counter, and high

speed SRAM onto a single monolithic circuit for reduced parts count in cache

dataRAMapplications. Synchronousdesignallowsprecisecyclecontrolwiththe

use of an external clock (K).

ZP PACKAGE

PBGA

CASE 999–01

Addresses (SA), data inputs (DQx), and all control signals except output

enable(G) and linear burst order (LBO) are clock (K) controlled through positive–

edge–triggered noninverting registers.

Bursts can be initiated with either ADSP or ADSC input pins. Subsequent burst

addresses can be generated internally by the MCM69F817 (burst sequence

operates in linear or interleaved mode dependent upon the state of LBO) and

controlled by the burst address advance (ADV) input pin.

Write cycles are internally self–timed and are initiated by the rising edge of the

clock (K) input. This feature eliminates complex off–chip write pulse generation

and provides increased timing flexibility for incoming signals.

Synchronous byte write (SBx), synchronous global write (SGW), and synchro-

nous write enable (SW) are provided to allow writes to either individual bytes or

to all bytes. The two bytes are designated as “a” and “b”. SBa controls DQa and

SBb controls DQb. Individual bytes are written if the selected byte writes SBx are

asserted with SW. All bytes are written if either SGW is asserted or if all SBx and

SW are asserted.

For read cycles, a flow–through SRAM allows output data to simply flow freely

from the memory array.

The MCM69F817 operates from a 3.3 V core power supply and all outputs

operate on a 3.3 V or 2.5 V power supply. All inputs and outputs are JEDEC stan-

dard JESD8–5 compatible.

•

MCM69F817 Speed Options

Flow–Through

Speed

Setup

0.5 ns

Hold

1 ns

KHQV

KHKH

150 MHz

133 MHz

117 MHz

6.7 ns

7.5 ns

8.5 ns

6 ns

375 mA

350 mA

325 mA

6.5 ns

7 ns

•

3.3 V + 10%, – 5% Core Power Supply, Operates with a 3.3 V or 2.5 V I/O

Supply

•

ADSP, ADSC, and ADV Burst Control Pins

Selectable Burst Sequencing Order (Linear/Interleaved)

Single–Cycle Deselect Timing

Internally Self–Timed Write Cycle

Byte Write and Global Write Control

PB1 Version 2.0 Compatible

JEDEC Standard 119–Pin PBGA Package

BurstRAM is a trademark of Motorola, Inc.

The PowerPC name is a trademark of IBM Corp., used under license therefrom.

This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice.

REV 1

6/26/97

Motorola, Inc. 1997

MOTOROLA FAST SRAM

MCM69F817

12 3 4 5 6 7...16

中文翻译

下载PDF

与MCM69F817ZP7R相关器件

型号	品牌	获取价格	描述	数据表
MCM69F819	MOTOROLA	获取价格	256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
MCM69F819TQ11	MOTOROLA	获取价格	256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
MCM69F819TQ11	NXP	获取价格	256KX18 CACHE SRAM, 11ns, PQFP100, TQFP-100
MCM69F819TQ11R	MOTOROLA	获取价格	256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
MCM69F819TQ11R	NXP	获取价格	256KX18 CACHE SRAM, 11ns, PQFP100, TQFP-100
MCM69F819TQ7.5	MOTOROLA	获取价格	256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
MCM69F819TQ7.5R	MOTOROLA	获取价格	256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
MCM69F819TQ7.5R	NXP	获取价格	256KX18 CACHE SRAM, 7.5ns, PQFP100, TQFP-100
MCM69F819TQ8	MOTOROLA	获取价格	256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
MCM69F819TQ8	NXP	获取价格	IC,SYNC SRAM,256KX18,CMOS,QFP,100PIN,PLASTIC

与MCM69F817ZP7R相关文章

摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
2024-09-18

29
贸泽上架Tallysman TW5386智能GNSS天线
2024-09-18

28
SL74HC10N：高性能三输入与非门解析
2024-09-03

100
AIC1781A 电池充电控制器深度解析
2024-09-03

94

产品中心

服务支持

精选活动

关于我们

帮助中心

MCM69F817ZP7R

MCM69F817ZP7R 技术参数

MCM69F817ZP7R 数据手册

与MCM69F817ZP7R相关器件

与MCM69F817ZP7R相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MCM69F817ZP7R

MCM69F817ZP7R 技术参数

MCM69F817ZP7R 数据手册

与MCM69F817ZP7R相关器件

与MCM69F817ZP7R相关文章

您还可以找

您在本页遇到什么问题？