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MC74VHC595DR2G PDF预览

MC74VHC595DR2G

更新时间: 2024-11-06 01:18:35
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
11页 117K
描述
8-Bit Shift Register with Output Storage Register

MC74VHC595DR2G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:0.78
Samacsys Description:NULL其他特性:SISO OPERATION ALSO AVAILABLE
计数方向:RIGHT系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:9.9 mm逻辑集成电路类型:SERIAL IN PARALLEL OUT
最大频率@ Nom-Sup:115000000 Hz湿度敏感等级:1
位数:8功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:2/5.5 V
传播延迟(tpd):17 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Shift Registers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:115 MHz

MC74VHC595DR2G 数据手册

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MC74VHC595  
8-Bit Shift Register with  
Output Storage Register  
(3-State)  
The MC74VHC595 is an advanced high speed 8−bit shift register  
with an output storage register fabricated with silicon gate CMOS  
technology.  
It achieves high speed operation similar to equivalent Bipolar  
Schottky TTL while maintaining CMOS low power dissipation.  
The MC74VHC595 contains an 8−bit static shift register which  
feeds an 8−bit storage register.  
www.onsemi.com  
MARKING DIAGRAMS  
16  
9
VHC595G  
AWLYWW  
Shift operation is accomplished on the positive going transition of  
the Shift Clock input (SCK). The output register is loaded with the  
contents of the shift register on the positive going transition of the  
Register Clock input (RCK). Since the RCK and SCK signals are  
independent, parallel outputs can be held stable during the shift  
operation. And, since the parallel outputs are 3−state, the VHC595 can  
be directly connected to an 8−bit bus. This register can be used in  
serial−to−parallel conversion, data receivers, etc.  
SOIC−16  
D SUFFIX  
CASE 751B  
1
8
16  
9
VHC  
595  
TSSOP−16  
DT SUFFIX  
CASE 948F  
ALYWG  
G
8
1
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems  
to 3 V systems.  
A
WL  
Y
= Assembly Location  
= Wafer Lot  
= Year  
W, WW = Work Week  
G or G = Pb−Free Package  
Features  
(Note: Microdot may be in either location)  
High Speed: f  
= 185 MHz (Typ) at V = 5 V  
CC  
max  
Low Power Dissipation: I = 4 mA (Max) at T = 25°C  
PIN ASSIGNMENT  
CC  
A
High Noise Immunity: V  
= V = 28% V  
NIL CC  
NIH  
QB  
QC  
1
2
16 VCC  
15 QA  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
Designed for 2 V to 5.5 V Operating Range  
QD  
QE  
3
4
5
6
7
8
14 SI  
Low Noise: V  
= 1.0 V (Max)  
OLP  
13 OE  
12 RCK  
11 SCK  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
QF  
QG  
ESD Performance: HBM > 2000 V; Machine Model > 200 V  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
QH  
10  
SCLR  
SQH  
GND  
9
These Devices are Pb−Free and are RoHS Compliant  
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC74VHC595DR2G  
SOIC−16  
(Pb−Free)  
2500 Tape &  
Reel  
MC74VHC595DTR2G, TSSOP−16 2500 Tape &  
NLV74VHC595DTR2G  
(Pb−Free)  
Reel  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2015  
1
Publication Order Number:  
February, 2015 − Rev. 6  
MC74VHC595/D  

MC74VHC595DR2G 替代型号

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