MC74VHC74MELG

更新时间： 2024-11-21 05:22:11

品牌	Logo	应用领域
安森美 - ONSEMI		触发器
页数	文件大小	规格书
6页	159K
描述
Dual D−Type Flip−Flop with Set and Reset

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中文翻译

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数据手册
替代型号

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MC74VHC74MELG 数据手册

MC74VHC74

Dual D−Type Flip−Flop

with Set and Reset

The MC74VHC74 is an advanced high speed CMOS D−type

flip−flop fabricated with silicon gate CMOS technology. It achieves

high speed operation similar to equivalent Bipolar Schottky TTL

while maintaining CMOS low power dissipation.

The signal level applied to the D input is transferred to Q output

during the positive going transition of the Clock pulse.

Reset (RD) and Set (SD) are independent of the Clock (CP) and are

accomplished by setting the appropriate input Low.

The internal circuit is composed of three stages, including a buffer

output which provides high noise immunity and stable output. The

inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V

systems to 3.0 V systems.

http://onsemi.com

MARKING

DIAGRAMS

SOIC−14

D SUFFIX

CASE 751A

VHC74G

AWLYWW

Features

VHC

TSSOP−14

DT SUFFIX

CASE 948G

• High Speed: f

• Low Power Dissipation: I = 2mA (Max) at T = 25°C

• High Noise Immunity: V

= 170MHz (Typ) at V = 5V

max

ALYWG

= V = 28% V

NIL CC

NIH

• Power Down Protection Provided on Inputs

• Balanced Propagation Delays

• Designed for 2.0 V to 5.5 V Operating Range

SOEIAJ−14

M SUFFIX

CASE 965

VHC74

ALYWG

• Low Noise: V

= 0.8 V (Max)

OLP

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300 mA

• ESD Performance:

= Assembly Location

Human Body Model > 2000 V;

Machine Model > 200 V

WL, L = Wafer Lot

Y, YY = Year

• Chip Complexity: 128 FETs or 32 Equivalent Gates

• Pb−Free Packages are Available*

WW, W = Work Week

G or G = Pb−Free Package

(Note: Microdot may be in either location)

FUNCTION TABLE

RD1

RD2

Inputs

Outputs

CP1

SD1

CP2

SD2

No Change

Figure 1. LOGIC DIAGRAM

*Both outputs will remain high as long as Set and Re-

set are low, but the output states are unpredictable

if Set and Reset go high simultaneously.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 3 of this data sheet.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Publication Order Number:

March, 2006 − Rev. 5

MC74VHC74/D

12 3 4 5 6

中文翻译

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MC74VHC74MELG 替代型号

型号	品牌	替代类型	描述	数据表
MC74VHC74DR2G	ONSEMI	完全替代	Dual D−Type Flip−Flop with Set and Reset
74VHC74M	ONSEMI	类似代替	双 D 型触发器，带预置和清除

与MC74VHC74MELG相关器件

型号	品牌	获取价格	描述	数据表
MC74VHC74MR2	ONSEMI	获取价格	AHC/VHC SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, EI
MC74VHC74MR2	MOTOROLA	获取价格	D Flip-Flop, AHC/VHC Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output,
MC74VHC86	ONSEMI	获取价格	Quad 2-Input XOR Gate
MC74VHC86_14	ONSEMI	获取价格	Quad 2-Input XOR Gate
MC74VHC86D	ONSEMI	获取价格	Quad 2-Input XOR Gate
MC74VHC86D	MOTOROLA	获取价格	AHC/VHC SERIES, QUAD 2-INPUT XOR GATE, PDSO14, PLASTIC, SOIC-14
MC74VHC86DR2	MOTOROLA	获取价格	AHC/VHC SERIES, QUAD 2-INPUT XOR GATE, PDSO14, PLASTIC, SOIC-14
MC74VHC86DR2	ROCHESTER	获取价格	AHC/VHC SERIES, QUAD 2-INPUT XOR GATE, PDSO14, SOIC-14
MC74VHC86DR2G	ONSEMI	获取价格	Quad 2-Input XOR Gate
MC74VHC86DT	ONSEMI	获取价格	Quad 2-Input XOR Gate

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