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MC74VHC86DR2G PDF预览

MC74VHC86DR2G

更新时间: 2024-11-22 01:11:27
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管逻辑集成电路石英晶振触发器
页数 文件大小 规格书
6页 89K
描述
Quad 2-Input XOR Gate

MC74VHC86DR2G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:1.3
系列:AHC/VHCJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:XOR GATE
最大I(ol):0.008 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/5.5 VProp。Delay @ Nom-Sup:10 ns
传播延迟(tpd):16.5 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3.9 mm

MC74VHC86DR2G 数据手册

 浏览型号MC74VHC86DR2G的Datasheet PDF文件第2页浏览型号MC74VHC86DR2G的Datasheet PDF文件第3页浏览型号MC74VHC86DR2G的Datasheet PDF文件第4页浏览型号MC74VHC86DR2G的Datasheet PDF文件第5页浏览型号MC74VHC86DR2G的Datasheet PDF文件第6页 
MC74VHC86  
Quad 2-Input XOR Gate  
The MC74VHC86 is an advanced high speed CMOS 2−input  
Exclusive−OR gate fabricated with silicon gate CMOS technology. It  
achieves high speed operation similar to equivalent Bipolar Schottky  
TTL while maintaining CMOS low power dissipation.  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output. The  
inputs tolerate voltages up to 7 V, allowing the interface of 5 V  
systems to 3 V systems.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Features  
14  
1
High Speed: t = 4.8 ns (Typ) at V = 5 V  
PD  
CC  
SOIC−14  
D SUFFIX  
CASE 751A  
Low Power Dissipation: I = 2 mA (Max) at T = 25°C  
VHC86G  
AWLYWW  
CC  
A
14  
High Noise Immunity: V  
= V = 28% V  
NIL CC  
NIH  
1
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
14  
Designed for 2 V to 5.5 V Operating Range  
VHC  
86  
TSSOP−14  
DT SUFFIX  
CASE 948G  
Low Noise: V  
= 0.8 V (Max)  
OLP  
ALYWG  
1
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
G
1
ESD Performance: Human Body Model (HBM) > 2000 V;  
A
= Assembly Location  
WL, L = Wafer Lot  
Y, YY = Year  
Machine Model > 200 V  
Chip Complexity: 56 FETs or 14 Equivalent Gates  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
WW, W = Work Week  
G or G = Pb−Free Package  
(Note: Microdot may be in either location)  
These Devices are Pb−Free and are RoHS Compliant  
FUNCTION TABLE  
1
A1  
3
Y1  
Inputs  
Output  
Y
2
B1  
4
A2  
A
B
6
L
L
H
H
L
H
L
L
H
H
L
Y2  
5
B2  
9
A3  
8
Y = AęB  
H
Y3  
Y4  
10  
12  
13  
B3  
A4  
B4  
11  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
Figure 1. Logic Diagram  
V
B4  
13  
A4  
12  
Y4  
11  
B3  
10  
A3  
9
Y3  
8
CC  
14  
1
2
3
4
5
6
7
A1  
B1  
Y1  
A2  
B2  
Y2 GND  
Figure 2. Pinout: 14−Lead Packages (Top View)  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
September, 2014 − Rev. 7  
MC74VHC86/D  

MC74VHC86DR2G 替代型号

型号 品牌 替代类型 描述 数据表
MM74HC86MX ONSEMI

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四 2 输入互斥 OR 门极
MC74VHC86MELG ONSEMI

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AHC/VHC SERIES, QUAD 2-INPUT XOR GATE, PDSO14, LEAD FREE, EIAJ, SOIC-14
MC74HC86ADG ONSEMI

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Quad 2−Input Exclusive OR Gate High−Performance Silicon−Gate CMOS

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