SEMICONDUCTOR TECHNICAL DATA
The MC74VHCT00A is an advanced high speed CMOS 2–input NAND
gate fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
The VHCT inputs are compatible with TTL levels. This device can be used
as a level converter for interfacing 3.3V to 5.0V, because it has full 5V CMOS
level output swings.
The VHCT00A input structures provide protection when voltages between
0V and 5.5V are applied, regardless of the supply voltage. The output
D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
structures also provide protection when V
structures help prevent device destruction caused by supply voltage –
input/output voltage mismatch, battery backup, hot insertion, etc.
= 0V. These input and output
CC
•
•
•
•
•
•
•
•
•
•
•
High Speed: t
= 5.0ns (Typ) at V
= 5V
DT SUFFIX
14–LEAD TSSOP PACKAGE
CASE 948G–01
PD
Low Power Dissipation: I
CC
= 2µA (Max) at T = 25°C
CC
A
TTL–Compatible Inputs: V = 0.8V; V = 2.0V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
IL IH
Designed for 4.5V to 5.5V Operating Range
Low Noise: V
= 0.8V (Max)
OLP
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 48 FETs or 12 Equivalent Gates
M SUFFIX
14–LEAD SOIC EIAJ PACKAGE
CASE 965–01
ORDERING INFORMATION
MC74VHCTXXAD
MC74VHCTXXADT
MC74VHCTXXAM
SOIC
TSSOP
SOIC EIAJ
LOGIC DIAGRAM
1
A1
3
Y1
Y2
Y3
Y4
2
B1
FUNCTION TABLE
4
5
A2
B2
6
8
Inputs
Output
Y
Y = AB
A
B
9
A3
B3
L
L
L
H
L
H
H
H
L
10
H
H
12
13
A4
B4
H
11
Pinout: 14–Lead Packages (Top View)
V
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
CC
14
1
2
3
4
5
6
7
A1
B1
Y1
A2
B2
Y2
GND
6/97
REV 0
1
Motorola, Inc. 1997