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MC74HCT273A PDF预览

MC74HCT273A

更新时间: 2024-11-05 23:01:35
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 触发器时钟
页数 文件大小 规格书
5页 135K
描述
Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs

MC74HCT273A 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
N SUFFIX  
PLASTIC PACKAGE  
CASE 738–03  
High–Performance Silicon–Gate CMOS  
20  
1
The MC74HCT273A may be used as a level converter for interfacing TTL  
or NMOS outputs to High–Speed CMOS inputs.  
The HCT273A is identical in pinout to the LS273.  
This device consists of eight D flip–flops with common Clock and Reset  
inputs. Each flip–flop is loaded with a low–to–high transition of the Clock  
input. Reset is asynchronous and active low.  
DW SUFFIX  
SOIC PACKAGE  
CASE 751D–04  
20  
1
ORDERING INFORMATION  
MC74HCTXXXAN Plastic  
Output Drive Capability: 10 LSTTL Loads  
TTL/NMOS Compatible Input Levels  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 µA  
MC74HCTXXXADW SOIC  
PIN ASSIGNMENT  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
RESET  
1
20  
V
CC  
Chip Complexity: 284 FETs or 71 Equivalent Gates  
Q0  
D0  
D1  
2
3
4
19  
18  
17  
Q7  
D7  
D6  
LOGIC DIAGRAM  
Q1  
Q2  
5
16  
15  
14  
13  
12  
11  
Q6  
6
Q5  
2
3
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
D2  
7
D5  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
5
6
4
D3  
8
D4  
7
Q3  
9
Q4  
8
9
GND  
10  
CLOCK  
DATA  
INPUTS  
NONINVERTING  
OUTPUTS  
13  
14  
17  
18  
12  
15  
16  
19  
FUNCTION TABLE  
Inputs  
Reset Clock  
Output  
11  
D
Q
CLOCK  
L
X
X
H
L
X
X
L
H
L
H
H
H
H
1
PIN 20 = V  
CC  
PIN 10 = GND  
RESET  
L
No Change  
No Change  
X = Don’t Care  
Z = High Impedance  
2/97  
REV 7  
Motorola, Inc. 1997  

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