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MC74HCT365ADTG PDF预览

MC74HCT365ADTG

更新时间: 2024-11-10 01:08:31
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
7页 124K
描述
Hex 3-State Noninverting Buffer with Common Enables and LSTTL Compatible Inputs

MC74HCT365ADTG 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:TSSOP包装说明:TSSOP, TSSOP16,.25
针数:16Reach Compliance Code:compliant
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
Factory Lead Time:45 weeks风险等级:1.5
控制类型:ENABLE LOW系列:HCT
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.006 A
湿度敏感等级:1位数:6
功能数量:1端口数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:RAIL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:36 ns
传播延迟(tpd):36 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

MC74HCT365ADTG 数据手册

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MC74HCT365A  
Hex 3-State Noninverting  
Buffer with Common  
Enables and LSTTL  
Compatible Inputs  
http://onsemi.com  
MARKING  
HighPerformance SiliconGate CMOS  
The MC74HCT365A is identical in pinout to the LS365. The device  
inputs are compatible with LSTTL outputs.  
This device is a highspeed hex buffer with 3state outputs and two  
common activelow Output Enables. When either of the enables is  
high, the buffer outputs are placed into highimpedance states. The  
HCT365A has noninverting outputs.  
DIAGRAMS  
16  
1
SOIC16  
D SUFFIX  
CASE 751B  
HCT365AG  
AWLYWW  
16  
1
Features  
16  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
TSSOP16  
DT SUFFIX  
CASE 948F  
HCT  
365A  
ALYWG  
G
16  
1
Low Input Current: 1.0 mA  
1
High Noise Immunity Characteristic of CMOS Devices  
A
= Assembly Location  
= Wafer Lot  
= Year  
In Compliance with the Requirements Defined by JEDEC Standard  
WL, L  
Y
No. 7A  
Chip Complexity: 90 FETs or 22.5 Equivalent Gates  
These are PbFree Devices*  
WW, W = Work Week  
= PbFree Package  
(Note: Microdot may be in either location)  
G or G  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
June, 2011 Rev. 1  
MC74HCT365A/D  

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MC74HCT365ADTR2G ONSEMI

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