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MC74HCT373ADWR2G PDF预览

MC74HCT373ADWR2G

更新时间: 2024-11-21 12:48:51
品牌 Logo 应用领域
安森美 - ONSEMI 锁存器
页数 文件大小 规格书
9页 153K
描述
Octal 3-State Noninverting Transparent Latch with LSTTL-Compatible Inputs

MC74HCT373ADWR2G 数据手册

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MC74HCT373A  
Octal 3-State Noninverting  
Transparent Latch with  
LSTTL-Compatible Inputs  
HighPerformance SiliconGate CMOS  
http://onsemi.com  
MARKING  
The MC74HCT373A may be used as a level converter for  
interfacing TTL or NMOS outputs to HighSpeed CMOS inputs.  
The HCT373A is identical in pinout to the LS373.  
DIAGRAMS  
The eight latches of the HCT373A are transparent Dtype latches.  
While the Latch Enable is high the Q outputs follow the Data Inputs.  
When Latch Enable is taken low, data meeting the setup and hold  
times becomes latched.  
The Output Enable does not affect the state of the latch, but when  
Output Enable is high, all outputs are forced to the highimpedance  
state. Thus, data may be latched even when the outputs are not  
enabled.  
The HCT373A is identical in function to the HCT573A, which has  
the input pins on the opposite side of the package from the output pins.  
This device is similar in function to the HCT533A, which has  
inverting outputs.  
20  
20  
PDIP20  
N SUFFIX  
CASE 738  
MC74HCT373AN  
AWLYYWWG  
1
1
20  
SOIC20  
DW SUFFIX  
CASE 751D  
HCT373A  
AWLYYWWG  
20  
1
1
20  
Output Drive Capability: 15 LSTTL Loads  
HCT  
373A  
ALYWG  
G
TSSOP20  
DT SUFFIX  
CASE 948E  
20  
TTL/NMOSCompatible Input Levels  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 mA  
1
1
20  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7 A  
Chip Complexity: 196 FETs or 49 Equivalent Gates  
These Devices are PbFree and are RoHS Compliant  
SOEIAJ20  
F SUFFIX  
CASE 967  
20  
74HCT373A  
AWLYWWG  
1
1
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
G or G  
= PbFree Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
Device  
Package  
PDIP20  
SOIC20  
Shipping  
18 / Box  
38 / Rail  
MC74HCT373ANG  
MC74HCT373ADWG  
MC74HCT373ADWR2G  
MC74HCT373AFELG  
SOIC20 1000 / Reel  
SOEIAJ20 2000 / Reel  
MC74HCT373ADTR2G TSSOP20 2500 / Reel  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
June, 2011 Rev. 12  
MC74HCT373A/D  

MC74HCT373ADWR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC74HCT373ADWG ONSEMI

类似代替

Octal 3-State Noninverting Transparent Latch with LSTTL-Compatible Inputs
M74HCT373RM13TR STMICROELECTRONICS

类似代替

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
SN74HCT373DWR TI

功能相似

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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