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MC74AC259DR

更新时间： 2024-09-16 20:08:19
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
9页 236K
描述
AC SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDSO16, PLASTIC, SOIC-16

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MC74AC259DR 技术参数

生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP,针数：16
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.21系列：AC
JESD-30 代码：R-PDSO-G16长度：9.9 mm
逻辑集成电路类型：D LATCH位数：1
功能数量：1端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE传播延迟（tpd）：17 ns
认证状态：Not Qualified座面最大高度：1.75 mm
最大供电电压 (Vsup)：6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL触发器类型：LOW LEVEL
宽度：3.9 mmBase Number Matches：1

MC74AC259DR 数据手册

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8-BIT  
ADDRESSABLE  
LATCH  
The MC74AC259/74ACT259 is a high-speed 8-bit addressable latch designed for  
general purpose storage applications in digital systems. It is a multifunctional device  
capable of storing single line data in eight addressable latches, and also a 1-of-8  
decoder and demultiplexer with active HIGH outputs. The device also incorporates  
an active LOW Common Clear for resetting all latches, as well as an active LOW  
Enable. It is functionally identical to the ALS259 8-bit addressable latch.  
• Serial-to-Parallel Conversion  
• Eight Bits of Storage with Output of Each Bit Available  
• Random (Addressable) Data Entry  
• Active High Demultiplexing or Decoding Capability  
• Easily Expandable  
• Common Clear  
N SUFFIX  
CASE 648-08  
PLASTIC  
FUNCTIONAL DESCRIPTION  
The MC74AC259/74ACT259 has four modes of operation as shown in the Mode  
Selection Table. In the addressable latch mode, data on the Data line (D) is written  
into the addressed latch. The addressed latch will follow the data input with all non-  
addressed latches remaining in their previous states in the memory mode. All latches  
remain in their previous state and are unaffected by the Data or Address inputs.  
In the one-of-eight decoding or demultiplexing mode, the addressed output will  
follow the state of the D input with all other outputs in the LOW state. In the clear  
mode all outputs are LOW and unaffected by the address and data inputs. When  
operating the MC74AC/ACT259 as an addressable latch, changing more than one  
bit of the address could impose a transient wrong address. Therefore, this should  
only be done while in the memory mode. The Mode Select Function Table  
summarizes the operations of the MC74AC/ACT259.  
D SUFFIX  
CASE 751B-05  
PLASTIC  
LOGIC SYMBOL  
V
MR  
15  
E
D
Q
Q
Q
Q
4
CC  
16  
7
6
5
14  
13  
12  
11  
10  
9
E
D
A
A
A
0
1
2
MR Q  
Q
Q
Q
Q
Q
Q
Q
0
1
2
3
4
5
6 7  
1
2
3
4
5
6
7
8
A
A
A
Q
Q
Q
Q
3
GND  
0
1
2
0
1
2
FACT DATA  
5-1  
1234567...9

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