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MC74AC259DR2 PDF预览

MC74AC259DR2

更新时间: 2024-11-19 05:09:59
品牌 Logo 应用领域
安森美 - ONSEMI 锁存器
页数 文件大小 规格书
11页 121K
描述
8−Bit Addressable Latch

MC74AC259DR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.36
其他特性:1:8 DMUX FOLLOWED BY LATCH系列:AC
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:D LATCH最大I(ol):0.012 A
湿度敏感等级:1位数:1
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
电源:3.3/5 VProp。Delay @ Nom-Sup:17 ns
传播延迟(tpd):17 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:FF/Latches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30触发器类型:LOW LEVEL
宽度:3.9 mmBase Number Matches:1

MC74AC259DR2 数据手册

 浏览型号MC74AC259DR2的Datasheet PDF文件第2页浏览型号MC74AC259DR2的Datasheet PDF文件第3页浏览型号MC74AC259DR2的Datasheet PDF文件第4页浏览型号MC74AC259DR2的Datasheet PDF文件第5页浏览型号MC74AC259DR2的Datasheet PDF文件第6页浏览型号MC74AC259DR2的Datasheet PDF文件第7页 
MC74AC259, MC74ACT259  
8−Bit Addressable Latch  
The MC74AC259/74ACT259 is a high−speed 8−bit addressable  
latch designed for general purpose storage applications in digital  
systems. It is a multifunctional device capable of storing single line  
data in eight addressable latches, and also a 1−of−8 decoder and  
demultiplexer with active HIGH outputs. The device also incorporates  
an active LOW Common Clear for resetting all latches, as well as an  
active LOW Enable. It is functionally identical to the ALS259 8−bit  
addressable latch.  
http://onsemi.com  
PDIP−16  
N SUFFIX  
CASE 648  
16  
Serial−to−Parallel Conversion  
Eight Bits of Storage with Output of Each Bit Available  
Random (Addressable) Data Entry  
Active High Demultiplexing or Decoding Capability  
Easily Expandable  
1
SOIC−16  
D SUFFIX  
CASE 751B  
16  
16  
1
1
Common Clear  
Pb−Free Packages are Available  
SOEIAJ−16  
M, MEL SUFFIX  
CASE 966  
V
CC  
MR  
E
D
Q
7
Q
Q
Q
4
6
5
16  
15  
14  
13  
12  
11  
10  
9
DEVICE MARKING INFORMATION  
See general marking information in the device marking  
section on page 9 of this data sheet.  
1
2
3
4
5
6
7
8
ORDERING INFORMATION  
A
0
A
1
A
2
Q
0
Q
1
Q
2
Q
3
GND  
See detailed ordering and shipping information in the package  
dimensions section on page 9 of this data sheet.  
Figure 1. Pinout: 16−Lead Packages Conductors  
(Top View)  
E
D
A
0
A
1
A
2
MR Q  
Q Q Q Q Q Q Q  
1 2 3 4 5 6 7  
0
Figure 2. Logic Symbol  
MODE SELECT TABLE  
E
MR  
Mode  
L
H
L
H
H
L
Addressable Latch  
Memory  
Active HIGH 8−Channel Demultiplexer  
Clear  
H
L
H = HIGH Voltage Level  
L = LOW Voltage Level  
© Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
November, 2005 − Rev. 6  
MC74AC259/D  

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