Document Number: MC33910
Rev. 4.0, 2/2008
Freescale Semiconductor
Advance Information
LIN System Basis Chip with
2x60mA High Side Drivers
33910
The 33910 is a Serial Peripheral Interface (SPI)-controlled System
Basis Chip (SBC), that combines many frequently used functions in
an MCU-based system, plus a Local Interconnect Network (LIN)
transceiver. It has a 5.0V, 60mA low dropout regulator with full
protection and reporting features. The device provides full SPI-
readable diagnostic and a selectable timing watchdog for detecting
errant operation. The LIN Protocol Specification, version 2.0
compliant LIN transceiver has waveshaping circuitry that can be
disabled for higher data rates.
SYSTEM BASIS CHIP WITH LIN
2ND GENERATION
Two 60mA high side switches with optional pulse-width modulation
(PWM) are implemented to drive small loads. One high voltage input
is available for use in contact monitoring or as external wake-up input.
This input can be used as high voltage Analog Input as well. The
voltage on this pin is divided by a selectable ratio and available via an
analog multiplexer.
The 33910 has three main operating modes: Normal (all functions
available); Sleep (VDD off, wake-up via LIN, wake-up input (L1), cyclic
sense and forced wake-up) and Stop (VDD on with limited current
capability, wake-up via CS, LIN bus, wake-up input, cyclic sense,
forced wake-up and external reset).
AC SUFFIX (Pb-FREE)
98ASH70029A
32-PIN LQFP
The 33910 is compatible with LIN Protocol Specification 2.0.
Features
ORDERING INFORMATION
Temperature
• Two 60mA high side switches
• One high voltage analog/logic input
Device
Package
Range (T )
A
• Full-duplex SPI at frequencies up to 4MHz
• LIN transceiver capable of up to 100kbps with wave shaping
• Configurable window watchdog
MC33910BAC/R2
MC34910BAC/R2
-40°C to 125°C
-40°C to 85°C
32-LQFP
• 5.0V low drop regulator with fault detection and low voltage
reset (LVR) circuitry
• Switched/protected 5.0V output (used for Hall sensors)
• Pb-free packaging designated by suffix code AC
33910
VBAT
VSENSE
HS1
VS1
VS2
L1
VDD
PWMIN
ADOUT0
LIN INTERFACE
LIN
MCU
MOSI
MISO
SCLK
CS
RXD
TXD
IRQ
HVDD
HS2
WDCONF
RST
Figure 1. 33910 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.