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MC34910G5AC PDF预览

MC34910G5AC

更新时间: 2024-11-27 15:18:11
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
100页 2084K
描述
System Basis Chip, LIN, 1x 5.0V/60mA LDOs, High-Side Drivers, Enhanced EMC, QFP 32

MC34910G5AC 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:QFP
包装说明:7 X 7 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MS-026BBA, LQFP-32针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.56
内置保护:OVER CURRENT; OVER VOLTAGE; THERMAL; UNDER VOLTAGE接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码:S-PQFP-G32JESD-609代码:e3
长度:7 mm湿度敏感等级:3
功能数量:1端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
输出电流流向:SOURCE AND SINK标称输出峰值电流:0.11 A
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.6 mm最大供电电压:18 V
最小供电电压:5.5 V标称供电电压:13.5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40断开时间:10 µs
接通时间:10 µs宽度:7 mm
Base Number Matches:1

MC34910G5AC 数据手册

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Document Number: MC33910  
Rev. 9.0, 7/2016  
NXP Semiconductors  
Technical Data  
LIN system basis chip with  
high-side drivers  
33910  
The 33910G5/BAC is a SMARTMOS Serial Peripheral Interface (SPI) controlled  
System Basis Chip (SBC), combining many frequently used functions in an MCU  
based system, plus a Local Interconnect Network (LIN) transceiver. The 33910  
has a 5.0 V, 50 mA/60 mA low dropout regulator with full protection and reporting  
features. The device provides full SPI readable diagnostics and a selectable  
timing watchdog for detecting errant operation. The LIN Protocol Specification  
2.0 and 2.1 compliant LIN transceiver has waveshaping circuitry which can be  
disabled for higher data rates.  
SYSTEM BASIS CHIP WITH LIN  
2ND GENERATION  
Two 50 mA/60 mA high-side switches with optional pulse-width modulated  
(PWM) are implemented to drive small loads. One high voltage input is available  
for use in contact monitoring, or as external wake-up input. This input can be  
used as high voltage Analog Input. The voltage on this pin is divided by a  
selectable ratio and available via an analog multiplexer.  
The 33910 has three main operating modes: Normal (all functions available),  
Sleep (VDD off, wake-up via LIN, wake-up inputs (L1), cyclic sense and forced  
wake-up), and Stop (VDD on with limited current capability, wake-up via CS, LIN  
bus, wake-up inputs, cyclic sense, forced wake-up and external reset).  
AC SUFFIX (Pb-FREE)  
98ASH70029A  
The 33910 is compatible with LIN Protocol Specification 2.0, 2.1, and  
SAEJ2602-2.  
32-PIN LQFP  
Features  
• Full-duplex SPI interface at frequencies up to 4.0 MHz  
• LIN transceiver capable of up to 100 kbps with wave shaping  
• Two 50 mA/60 mA high-side switches  
• One high voltage analog/logic Input  
• Configurable window watchdog  
Applications  
• Window lift  
• Mirror switch  
• Door lock  
• Sunroof  
• 5.0 V low drop regulator with fault detection and low voltage reset (LVR)  
circuitry  
• Light control  
• Switched/protected 5.0 V output (used for Hall sensors)  
33910  
VBAT  
VSENSE  
HS1  
VS1  
VS2  
L1  
VDD  
PWMIN  
ADOUT0  
LIN INTERFACE  
LIN  
MCU  
MOSI  
MISO  
SCLK  
CS  
RXD  
TXD  
IRQ  
HVDD  
HS2  
WDCONF  
RST  
Figure 1. 33910 simplified application diagram  
© 2016 NXP B.V.  

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