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MC10H209_06 PDF预览

MC10H209_06

更新时间: 2024-01-29 23:13:43
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
6页 150K
描述
Dual 4−5−Input OR/NOR Gate

MC10H209_06 数据手册

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MC10H209  
Dual 4−5−Input OR/NOR  
Gate  
Description  
The MC10H209 is a Dual 45input OR/NOR gate. This MECL  
part is a functional/pinout duplication of the MECL III part MC1688.  
http://onsemi.com  
MARKING DIAGRAMS*  
Features  
Propagation Delay Average, 0.75 ns Typical  
Power Dissipation 125 mW Typical  
16  
Improved Noise Margin 150 mV (Over Operating Voltage and  
MC10H209L  
AWLYYWW  
Temperature Range)  
Voltage Compensated  
1
MECL 10KCompatible  
CDIP16  
L SUFFIX  
CASE 620A  
PbFree Packages are Available*  
LOGIC DIAGRAM  
4
3
2
16  
1
5
6
MC10H209P  
AWLYYWW  
16  
7
1
PDIP16  
P SUFFIX  
CASE 648  
9
10  
11  
12  
13  
14  
15  
10H209  
ALYWG  
V
V
V
= PIN 1  
= PIN 16  
CC1  
CC2  
= PIN 8  
EE  
SOEIAJ16  
CASE 966  
DIP  
PIN ASSIGNMENT  
1 20  
V
V
B
B
B
B
B
B
B
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
CC2  
A
A
10H209G  
AWLYYWW  
20  
OUT  
OUT  
OUT  
OUT  
IN  
1
PLLC20  
FN SUFFIX  
CASE 775  
A
IN  
A
IN  
IN  
A
= Assembly Location  
= Year  
A
IN  
IN  
WL, L = Wafer Lot  
YY, Y  
A
IN  
IN  
WW, W = Work Week  
V
IN  
EE  
G
= PbFree Package  
Pin assignment is for DualinLine Package.  
For PLCC pin assignment, see the Pin Conversion Tables on page 18  
of the ON Semiconductor MECL Data Book (DL122/D).  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 Rev. 7  
MC10H209/D  

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