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MC10H210FN

更新时间： 2024-01-11 16:06:34
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极
页数 文件大小 规格书
3页 97K
描述
Dual 3-Input 3-Output OR Gate

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中文翻译

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MC10H210FN 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DIP, DIP16,.3Reach Compliance Code：unknown
风险等级：5.92JESD-30 代码：R-PDIP-T16
JESD-609代码：e0逻辑集成电路类型：OR GATE
端子数量：16最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP16,.3
封装形状：RECTANGULAR封装形式：IN-LINE
认证状态：Not Qualified施密特触发器：NO
子类别：Gates表面贴装：NO
技术：ECL温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
Base Number Matches：1

MC10H210FN 数据手册

 浏览型号MC10H210FN的Datasheet PDF文件第2页浏览型号MC10H210FN的Datasheet PDF文件第3页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10H210 is designed to drive up to six transmission lines simultan–  
eously. The multiple outputs of this device also allow the wire “OR”–ing of  
several levels of gating for minimization of gate and package count.  
The ability to control three parallel lines with minimum propagation delay  
from a single point makes the MC10H210 particularly useful in clock distribution  
applications where minimum clock skew is desired.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
•
•
•
Propagation Delay Average, 1.0 ns Typical  
Power Dissipation, 160 mW Typical  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
•
•
Voltage Compensated  
MECL 10K–Compatible  
FN SUFFIX  
PLCC  
CASE 775–02  
MAXIMUM RATINGS  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
LOGIC DIAGRAM  
Input Voltage (V  
= 0)  
V
I
0 to V  
CC  
EE  
Output Current— Continuous  
— Surge  
I
out  
50  
100  
5
6
7
2
3
4
Operating Temperature Range  
T
A
0 to +75  
°C  
Storage Temperature Range— Plastic  
— Ceramic  
T
–55 to +150  
–55 to +165  
°C  
°C  
stg  
9
10  
11  
12  
13  
14  
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
25°  
75°  
V
V
V
= PINS 1, 15  
= PIN 16  
= PIN 8  
Characteristic  
Power Supply Current  
Input Current High  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
Symbol Min  
Max  
42  
Min  
—
Max  
38  
Min  
—
Max  
42  
Unit  
CC1  
CC2  
EE  
I
—
—
mA  
µA  
µA  
E
I
720  
—
—
450  
—
—
450  
—
inH  
I
0.5  
0.5  
0.3  
inL  
DIP  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc  
OH  
PIN ASSIGNMENT  
V
OL  
V
IH  
V
A
V
V
B
B
B
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
CC2  
CC1  
OUT  
OUT  
OUT  
V
IL  
OUT  
OUT  
OUT  
AC PARAMETERS  
Propagation Delay  
Rise Time  
A
A
t
pd  
0.5  
1.55  
1.8  
0.55  
0.75  
0.75  
1.55  
1.9  
0.6  
0.8  
0.8  
1.7  
2.0  
2.0  
ns  
ns  
ns  
t
0.75  
0.75  
r
Fall Time  
t
1.8  
1.9  
f
A
IN  
NOTE:  
A
B
B
B
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed  
circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated  
through a 50–ohm resistor to –2.0 volts.  
IN  
IN  
IN  
IN  
A
IN  
V
Note: If crosstalk is present, double bypass capacitor to 0.2 µF.  
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  
123

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