MC10H160
12−Bit Parity
Generator−Checker
Description
The MC10H160 is a 12−bit parity generator−checker. The output
goes high when an odd number of inputs are high providing the odd
parity function. Unconnected inputs are pulled to a logic low allowing
parity detection and generation for less than 12−bits. The MC10H160
is a functional pin duplication of the standard 10K family part with
100% improvement in propagation delay and no increase in
power−supply current.
http://onsemi.com
MARKING DIAGRAMS*
16
MC10H160L
AWLYYWW
Features
• Propagation Delay, 2.5 ns Typical
1
• Power Dissipation, 320 mW Typical
• Improved Noise Margin 150 mV
(Over Operating Voltage and Temperature Range)
• Voltage Compensated
CDIP−16
L SUFFIX
CASE 620A
• MECL 10K™ Compatible
16
1
• Pb−Free Packages are Available*
MC10H160P
AWLYYWWG
16
1
LOGIC DIAGRAM
3
PDIP−16
P SUFFIX
CASE 648
4
5
V
V
V
= PIN 1
= PIN 16
CC1
CC2
TRUTH TABLE
INPUT
= PIN 8
6
7
EE
OUTPUT
10H160
ALYWG
Sum of
High Level
Inputs
Pin 2
9
10
2
Even
Odd
Low
11
12
High
SOEIAJ−16
CASE 966
13
14
1 20
DIP
PIN ASSIGNMENT
15
10H160G
AWLYYWW
20
1
V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC2
CC1
OUT
IN1
IN2
IN3
IN4
IN5
IN12
IN11
IN10
IN9
PLLC−20
FN SUFFIX
CASE 775
A
= Assembly Location
= Year
WL, L = Wafer Lot
YY, Y
WW, W = Work Week
G
IN8
IN7
= Pb−Free Package
IN6
V
EE
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
February, 2006 − Rev. 8
MC10H160/D