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MC10H160LS PDF预览

MC10H160LS

更新时间: 2024-09-22 13:11:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 运算电路逻辑集成电路
页数 文件大小 规格书
3页 99K
描述
Parity Generator/Checker, ECL, CDIP16

MC10H160LS 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.92
JESD-30 代码:R-XDIP-T16JESD-609代码:e0
逻辑集成电路类型:PARITY GENERATOR/CHECKER端子数量:16
最高工作温度:70 °C最低工作温度:
封装主体材料:CERAMIC封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
子类别:Arithmetic Circuits表面贴装:NO
技术:ECL温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

MC10H160LS 数据手册

 浏览型号MC10H160LS的Datasheet PDF文件第2页浏览型号MC10H160LS的Datasheet PDF文件第3页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10H160 is a 12–bit parity generator–checker. The output goes high  
when an odd number of inputs are high providing the odd parity function.  
Unconnected inputs are pulled to a logic low allowing parity detection and  
generation for less than 12 bits. The MC10H160 is a functional pin duplication  
of the standard 10K family part with 100% improvement in propagation delay  
and no increase in power–supply current.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
Propagation Delay, 2.5 ns Typical  
Power Dissipation, 320 mW Typical  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
FN SUFFIX  
PLCC  
CASE 775–02  
Voltage Compensated  
MECL 10K–Compatible  
LOGIC DIAGRAM  
MAXIMUM RATINGS  
V
V
V
= PIN 1  
= PIN 16  
3
CC1  
CC2  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
4
5
= PIN 8  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
EE  
CC  
Input Voltage (V  
= 0)  
V
I
0 to V  
50  
6
7
CC  
EE  
Output CurrentContinuous  
— Surge  
I
out  
9
100  
2
10  
Operating Temperature Range  
T
0 to +75  
°C  
A
11  
12  
Storage Temperature RangePlastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
°C  
°C  
13  
14  
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
15  
25°  
75°  
TRUTH TABLE  
Characteristic  
Symbol Min  
Max  
Min  
Max  
Min  
Max  
Unit  
INPUT  
OUTPUT  
Power Supply Current  
I
88  
78  
88  
mA  
E
Sum of  
High Level  
Inputs  
Pin 2  
Input Current High  
Pins 3,5,7,10,12,14  
Pins 4,6,9,11,13,15  
I
µA  
inH  
391  
457  
246  
285  
246  
285  
Even  
Odd  
Low  
High  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
I
0.5  
0.5  
0.3  
µA  
inL  
V
OH  
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc  
V
OL  
DIP  
V
PIN ASSIGNMENT  
IH  
V
IL  
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CC2  
CC1  
AC PARAMETERS  
Propagation Delay  
Rise Time  
IN12  
IN11  
IN10  
IN9  
OUT  
IN1  
IN2  
IN3  
IN4  
IN5  
t
1.1  
3.1  
1.5  
1.5  
1.1  
3.3  
1.6  
1.6  
1.2  
3.5  
1.7  
1.7  
ns  
ns  
ns  
pd  
t
0.55  
0.55  
0.55  
0.55  
0.75  
0.75  
r
Fall Time  
t
f
NOTE:  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit  
board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a  
50–ohm resistor to –2.0 volts.  
IN8  
IN7  
IN6  
V
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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