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MC10113LS PDF预览

MC10113LS

更新时间: 2024-10-31 13:11:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA
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5页 108K
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MC10113LS 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10113 is a quad Exclusive OR gate, with an enable common to all  
four gates. The outputs may be wire–ORed together to perform a 4–bit  
comparison function (A = B). The enable is active low.  
P
= 175 mW typ/pkg (No Load)  
= 2.5 ns typ  
D
t
pd  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
t , t = 2.0 ns typ (20% to 80%)  
r f  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
LOGIC DIAGRAM  
FN SUFFIX  
PLCC  
CASE 775–02  
E
9
4
5
2
3
DIP  
PIN ASSIGNMENT  
TRUTH TABLE  
6
7
IN  
E
OUTPUT  
V
A
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CC2  
CC1  
L
L
L
H
L
L
L
L
L
H
L
H
H
L
D
C
D
D
C
C
OUT  
OUT  
IN  
OUT  
OUT  
H
H
X
B
10  
11  
H
X
14  
15  
A
IN  
L
A
IN  
IN  
B
IN  
IN  
12  
13  
B
IN  
IN  
ENABLE  
V
EE  
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
V
3/93  
Motorola, Inc. 1996  
REV 5  

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