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MC10113P PDF预览

MC10113P

更新时间: 2024-10-30 22:54:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极触发器逻辑集成电路石英晶振光电二极管输出元件
页数 文件大小 规格书
5页 108K
描述
Quad Exclusive OR Gate

MC10113P 技术参数

生命周期:Transferred零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.4其他特性:STROBED OUTPUTS
系列:10KJESD-30 代码:R-PDIP-T16
JESD-609代码:e0长度:19.175 mm
逻辑集成电路类型:XOR GATE功能数量:4
输入次数:2端子数量:16
最高工作温度:85 °C最低工作温度:-30 °C
输出特性:OPEN-EMITTER封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:-5.2 V最大电源电流(ICC):46 mA
Prop。Delay @ Nom-Sup:5.5 ns传播延迟(tpd):5 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:4.44 mm子类别:Gates
表面贴装:NO技术:ECL
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

MC10113P 数据手册

 浏览型号MC10113P的Datasheet PDF文件第2页浏览型号MC10113P的Datasheet PDF文件第3页浏览型号MC10113P的Datasheet PDF文件第4页浏览型号MC10113P的Datasheet PDF文件第5页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10113 is a quad Exclusive OR gate, with an enable common to all  
four gates. The outputs may be wire–ORed together to perform a 4–bit  
comparison function (A = B). The enable is active low.  
P
= 175 mW typ/pkg (No Load)  
= 2.5 ns typ  
D
t
pd  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
t , t = 2.0 ns typ (20% to 80%)  
r f  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
LOGIC DIAGRAM  
FN SUFFIX  
PLCC  
CASE 775–02  
E
9
4
5
2
3
DIP  
PIN ASSIGNMENT  
TRUTH TABLE  
6
7
IN  
E
OUTPUT  
V
A
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CC2  
CC1  
L
L
L
H
L
L
L
L
L
H
L
H
H
L
D
C
D
D
C
C
OUT  
OUT  
IN  
OUT  
OUT  
H
H
X
B
10  
11  
H
X
14  
15  
A
IN  
L
A
IN  
IN  
B
IN  
IN  
12  
13  
B
IN  
IN  
ENABLE  
V
EE  
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
V
3/93  
Motorola, Inc. 1996  
REV 5  

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