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MC10113P PDF预览

MC10113P

更新时间: 2024-10-31 04:59:43
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路石英晶振光电二极管输出元件
页数 文件大小 规格书
8页 109K
描述
Quad Exclusive OR Gate

MC10113P 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:PLASTIC, DIP-16
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.41
Is Samacsys:N系列:10K
JESD-30 代码:R-PDIP-T16JESD-609代码:e0
长度:19.175 mm逻辑集成电路类型:XOR GATE
功能数量:4输入次数:2
端子数量:16最高工作温度:85 °C
最低工作温度:-30 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:-5.2 V
最大电源电流(ICC):46 mAProp。Delay @ Nom-Sup:5.5 ns
传播延迟(tpd):5 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:4.44 mm
子类别:Gates表面贴装:NO
技术:ECL温度等级:OTHER
端子面层:Tin/Lead (Sn80Pb20)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

MC10113P 数据手册

 浏览型号MC10113P的Datasheet PDF文件第2页浏览型号MC10113P的Datasheet PDF文件第3页浏览型号MC10113P的Datasheet PDF文件第4页浏览型号MC10113P的Datasheet PDF文件第5页浏览型号MC10113P的Datasheet PDF文件第6页浏览型号MC10113P的Datasheet PDF文件第7页 
MC10113  
Quad Exclusive OR Gate  
The MC10113 is a quad Exclusive OR gate, with an enable common  
to all four gates. The outputs may be wire–ORed together to perform a  
4–bit comparison function (A = B). The enable is active low.  
P = 175 mW typ/pkg (No Load)  
D
t = 2.5 ns typ  
pd  
http://onsemi.com  
t , t = 2.0 ns typ (20%–80%)  
r
f
MARKING  
DIAGRAMS  
LOGIC DIAGRAM  
E
9
16  
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CDIP–16  
L SUFFIX  
CASE 620  
CC2  
MC10113L  
AWLYYWW  
4
5
V
EE  
2
3
1
16  
6
7
PDIP–16  
P SUFFIX  
CASE 648  
MC10113P  
AWLYYWW  
1
10  
11  
1
14  
15  
PLCC–20  
FN SUFFIX  
CASE 775  
10113  
DIP  
PIN ASSIGNMENT  
AWLYYWW  
12  
13  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
A
V
CC2  
CC1  
A
= Assembly Location  
D
C
D
D
C
C
OUT  
OUT  
IN  
OUT  
OUT  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
B
A
IN  
A
IN  
B
IN  
B
IN  
IN  
ORDERING INFORMATION  
IN  
Device  
Package  
Shipping  
IN  
ENABLE  
MC10113L  
CDIP–16  
25 Units / Rail  
V
EE  
MC10113P  
PDIP–16  
PLCC–20  
25 Units / Rail  
46 Units / Rail  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion Tables on page 18  
of the ON Semiconductor MECL Data Book (DL122/D).  
MC10113FN  
TRUTH TABLE  
IN  
E
OUTPUT  
L
L
L
H
L
L
L
L
L
H
L
H
H
L
H
H
X
H
X
L
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
January, 2002 – Rev. 7  
MC10113/D  

MC10113P 替代型号

型号 品牌 替代类型 描述 数据表
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完全替代

Quad Exclusive OR Gate

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