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MC100ES60T22EF PDF预览

MC100ES60T22EF

更新时间: 2024-11-30 20:03:15
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
7页 639K
描述
SOIC-8, Tube

MC100ES60T22EF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.36
Base Number Matches:1

MC100ES60T22EF 数据手册

 浏览型号MC100ES60T22EF的Datasheet PDF文件第2页浏览型号MC100ES60T22EF的Datasheet PDF文件第3页浏览型号MC100ES60T22EF的Datasheet PDF文件第4页浏览型号MC100ES60T22EF的Datasheet PDF文件第5页浏览型号MC100ES60T22EF的Datasheet PDF文件第6页浏览型号MC100ES60T22EF的Datasheet PDF文件第7页 
3.3V Dual LVTTL/LVCMOS-to-Differential MC100ES60T22  
LVPECL Translator  
DATA SHEET  
The MC100ES60T22 is a low skew dual LVTTL/LVCMOS to differential LVPECL  
translator. The low voltage PECL levels, small package, and dual gate design are ideal for  
clock translation applications.  
Features  
D SUFFIX  
8-LEAD SOIC PACKAGE  
CASE 751-07  
280 ps typical propagation delay  
100 ps max output-to-output skew  
LVPECL operating range: VCC = 3.135 V to 3.8 V  
8-lead SOIC and 8-lead TSSOP packages  
Ambient temperature range –40°C to +85°C  
8-lead SOIC Pb-free package available  
EF SUFFIX  
8-LEAD SOIC PACKAGE  
Pb-FREE PACKAGE  
CASE 751-07  
DT SUFFIX  
8-LEAD TSSOP PACKAGE  
CASE 1640-01  
Q0  
Q0  
1
2
8
7
VCC  
EJ SUFFIX  
8-LEAD SOIC PACKAGE  
Pb-FREE PACKAGE  
CASE 1640-01  
D0  
LVPECL  
LVTTL/LVCMOS  
ORDERING INFORMATION  
Q1  
Q1  
3
4
6
5
D1  
Device  
Package  
SOIC-8  
MC100ES60T22D  
MC100ES60T22DR2  
MC100ES60T22EF  
MC100ES60T22EFR2  
MC100ES60T22DT  
MC100ES60T22DTR2  
MC100ES60T22EJ  
MC100ES60T22EJR2  
SOIC-8  
SOIC-8 (Pb-Free)  
SOIC-8 (Pb-Free)  
TSSOP-8  
GND  
TSSOP-8  
Figure 1. 8-Lead Pinout (Top View) and Logic Diagram  
TSSOP-8 (Pb-Free)  
TSSOP-8 (Pb-Free)  
PIN DESCRIPTION  
Pin  
D0, D1  
Function  
LVTTL/LVCMOS Inputs  
LVPECL Differential Outputs  
Positive Supply  
Qn, Qn  
VCC  
GND  
Negative Supply  
MPC100ES60T22 REVISION 4 AUGUST 14, 2009  
1
©2009 Integrated Device Technology, Inc.  

MC100ES60T22EF 替代型号

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MC100LVELT22DTG ONSEMI

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3.3V Dual LVTTL/LVCMOS to Differential LVPECL to Differential LVPECL

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