MC100EP33

更新时间： 2024-11-24 23:01:31

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
12页	83K
描述
3.3V 5VECL / 4 Divider

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MC100EP33 数据手册

MC10EP33, MC100EP33

3.3V / 5VĄECL B4 Divider

The MC10/100EP33 is an integrated B4 divider. The differential

clock inputs.

The V pin, an internally generated voltage supply, is available to

this device only. For single-ended input conditions, the unused

differential input is connected to V as a switching reference voltage.

http://onsemi.com

MARKING DIAGRAMS*

may also rebias AC coupled inputs. When used, decouple V

and V via a 0.01 mF capacitor and limit current sourcing or sinking

to 0.5 mA. When not used, V should be left open.

The reset pin is asynchronous and is asserted on the rising edge.

Upon power–up, the internal flip–flops will attain a random state; the

reset allows for the synchronization of multiple EP33’s in a system.

The 100 Series contains temperature compensation.

HEP33

ALYW

KEP33

ALYW

SO–8

D SUFFIX

CASE 751

• 320 ps Propagation Delay

• Maximum Frequency > 4 GHz Typical

• PECL Mode Operating Range: V = 3.0 V to 5.5 V

with V = 0 V

HP33

ALYW

KP33

ALYW

• NECL Mode Operating Range: V = 0 V

TSSOP–8

DT SUFFIX

CASE 948R

with V = –3.0 V to –5.5 V

• Open Input Default State

• Safety Clamp on Inputs

L = Wafer Lot

Y = Year

W = Work Week

H = MC10

K = MC100

A = Assembly Location

• Q Output Will Default LOW with Inputs Open or at V

• V Output

*For additional information, see Application Note

AND8002/D

ORDERING INFORMATION

Device

Package

Shipping

MC10EP33D

SO–8

98 Units/Rail

MC10EP33DR2

MC100EP33D

MC100EP33DR2

MC10EP33DT

SO–8

2500 Tape & Reel

98 Units/Rail

SO–8

2500 Tape & Reel

100 Units/Rail

TSSOP–8

MC10EP33DTR2 TSSOP–8 2500 Tape & Reel

MC100EP33DT TSSOP–8 100 Units/Rail

MC100EP33DTR2 TSSOP–8 2500 Tape & Reel

Semiconductor Components Industries, LLC, 2002

Publication Order Number:

September, 2002 – Rev. 5

MC10EP33/D

12 3 4 5 6 7...12

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