5秒后页面跳转
MC100EP35D PDF预览

MC100EP35D

更新时间: 2024-11-09 05:22:27
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
11页 158K
描述
3.3V / 5V ECL JK Flip−Flop

MC100EP35D 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOIC-8
针数:8Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:7.97
其他特性:NECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V系列:100E
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:4.9 mm逻辑集成电路类型:J-K FLIP-FLOP
最大频率@ Nom-Sup:3000000000 Hz位数:2
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:RAIL峰值回流温度(摄氏度):240
电源:-4.5 V最大电源电流(ICC):50 mA
Prop。Delay @ Nom-Sup:0.575 ns传播延迟(tpd):0.49 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:FF/Latches最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn80Pb20)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:3.9 mm
Base Number Matches:1

MC100EP35D 数据手册

 浏览型号MC100EP35D的Datasheet PDF文件第2页浏览型号MC100EP35D的Datasheet PDF文件第3页浏览型号MC100EP35D的Datasheet PDF文件第4页浏览型号MC100EP35D的Datasheet PDF文件第5页浏览型号MC100EP35D的Datasheet PDF文件第6页浏览型号MC100EP35D的Datasheet PDF文件第7页 
MC10EP35, MC100EP35  
3.3V / 5VꢀECL JK Flip−Flop  
Description  
The MC10/100EP35 is a higher speed/low voltage version of the  
EL35 JK flipflop. The J/K data enters the master portion of the  
flipflop when the clock is LOW and is transferred to the slave, and  
thus the outputs, upon a positive transition of the clock. The reset pin is  
asynchronous and is activated with a logic HIGH.  
http://onsemi.com  
The 100 Series contains temperature compensation.  
MARKING  
DIAGRAMS*  
Features  
410 ps Propagation Delay  
Maximum Frequency > 3 GHz Typical  
8
1
8
8
HEP35  
ALYW  
KEP35  
ALYW  
G
PECL Mode Operating Range: V = 3.0 V to 5.5 V  
1
CC  
G
with V = 0 V  
SOIC8  
D SUFFIX  
CASE 751  
EE  
1
NECL Mode Operating Range: V = 0 V  
CC  
with V = 3.0 V to 5.5 V  
EE  
Open Input Default State  
Q Output Will Default LOW with Inputs Open or at V  
PbFree Packages are Available  
8
1
8
1
8
EE  
1
HP35  
KP35  
ALYWG  
ALYWG  
TSSOP8  
DT SUFFIX  
CASE 948R  
G
G
1
4
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
H
K
= MC10  
= MC100  
A
L
= Assembly Location  
= Wafer Lot  
5R = MC10  
3M = MC100  
Y
W
M
G
= Year  
= Work Week  
= Date Code  
= PbFree Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 5  
MC10EP35/D  

MC100EP35D 替代型号

型号 品牌 替代类型 描述 数据表
MC100EP35DG ONSEMI

类似代替

3.3V / 5V ECL JK Flip−Flop

与MC100EP35D相关器件

型号 品牌 获取价格 描述 数据表
MC100EP35DG ONSEMI

获取价格

3.3V / 5V ECL JK Flip−Flop
MC100EP35DG ROCHESTER

获取价格

100E SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8, LEAD FREE
MC100EP35DR2 ONSEMI

获取价格

3.3V / 5V ECL JK Flip−Flop
MC100EP35DR2 ROCHESTER

获取价格

100E SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8, SOIC-8
MC100EP35DR2G ONSEMI

获取价格

3.3V / 5V ECL JK Flip−Flop
MC100EP35DR2G ROCHESTER

获取价格

100E SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8, LEAD FREE
MC100EP35DT ONSEMI

获取价格

IC 100E SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8, PLASTI
MC100EP35DTG ROCHESTER

获取价格

100E SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8, LEAD FREE
MC100EP35DTG ONSEMI

获取价格

ECL JK 触发器
MC100EP35DTR2 ONSEMI

获取价格

3.3V / 5V ECL JK Flip−Flop