MC100EP446FAG

更新时间： 2024-02-03 15:15:11

品牌	Logo	应用领域
安森美 - ONSEMI		转换器
页数	文件大小	规格书
20页	269K
描述
3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

MC100EP446FAG 数据手册

MC10EP446, MC100EP446

3.3 V/5 V 8-Bit

CMOS/ECL/TTL Data Input

Parallel/Serial Converter

Description

http://onsemi.com

The MC10/100EP446 is an integrated 8−bit parallel to serial data

converter. The device is designed with unique circuit topology to

operate for NRZ data rates up to 3.2 Gb/s. The conversion sequence

from parallel data into a serial data stream is from bit D0 to D7. The

parallel input pins D0−D7 are configurable to be threshold controlled by

CMOS, ECL, or TTL level signals. The serial data rate output can be

selected at internal clock data rate or twice the internal clock data rate

using the CKSEL pin.

Control pins are provided to reset (SYNC) and disable internal clock

circuitry (CKEN). In either CKSEL modes, the internal flip−flops are

triggered on the rising edge for CLK and the multiplexers are switched

on the falling edge of CLK, therefore, all associated specification

limits are referenced to the negative edge of the clock input.

MARKING DIAGRAMS*

MCxxx

EP446

AWLYYWWG

LQFP−32

FA SUFFIX

CASE 873A

Additionally, V pin is provided for single−ended input condition.

The 100 Series devices contain temperature compensation network.

MCxxx

EP446

Features

AWLYYWWG

• 3.2 Gb/s Typical Data Rate Capability

• Differential Clock and Serial Outputs

QFN32

MN SUFFIX

CASE 488AM

• V Output for Single-ended Input Applications

• Asynchronous Data Reset (SYNC)

• PECL Mode Operating Range:

xxx

= 10 or 100

= Assembly Location

= 3.0 V to 5.5 V with V = 0 V

WL, L = Wafer Lot

YY, Y = Year

• NECL Mode Operating Range:

= 0 V with V = −3.0 V to −5.5 V

WW, W = Work Week

G or G = Pb−Free Package

• Open Input Default State

• Safety Clamp on Inputs

• Parallel Interface Can Support PECL, TTL or CMOS

• Pb−Free Packages are Available*

(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 18 of this data sheet.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Publication Order Number:

February, 2007 − Rev. 9

MC10EP446/D

12 3 4 5 6 7...20

中文翻译

下载PDF

与MC100EP446FAG相关器件

型号	品牌	获取价格	描述	数据表
MC100EP446FAR2	ONSEMI	获取价格	3.3V/5V 8々Bit CMOS/ECL/TTL Data Input Paralle
MC100EP446FAR2G	ONSEMI	获取价格	3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter
MC100EP446MNG	ONSEMI	获取价格	3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter
MC100EP446MNR4G	ONSEMI	获取价格	3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter
MC100EP451	ONSEMI	获取价格	3.3V / 5VECL 6-Bit Differential Register with Master Reset
MC100EP451FA	ONSEMI	获取价格	3.3V / 5VECL 6-Bit Differential Register with Master Reset
MC100EP451FA	ROCHESTER	获取价格	100E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQFP32, LQFP-32
MC100EP451FAG	ONSEMI	获取价格	3.3V / 5VECL 6-Bit Differential Register with Master Reset
MC100EP451FAG	ROCHESTER	获取价格	100E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQFP32, LEAD FREE,
MC100EP451FAR2	ONSEMI	获取价格	3.3V / 5VECL 6-Bit Differential Register with Master Reset

与MC100EP446FAG相关文章

BSS138LT3G：一款高效能N沟道MOSFET的全面解析
2024-07-04

11
解读EGP10B二极管资料手册：产品特性、参数分析
2024-07-04

10
RT9164AGG手册资料详解：引脚信息、设计指南
2024-07-04

12
2SA1037KPT资料详解：产品特性、电气参数、设计指南
2024-07-04

15

产品中心

服务支持

精选活动

关于我们

帮助中心

MC100EP446FAG

MC100EP446FAG 数据手册

与MC100EP446FAG相关器件

与MC100EP446FAG相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MC100EP446FAG

MC100EP446FAG 数据手册

与MC100EP446FAG相关器件

与MC100EP446FAG相关文章

您还可以找

您在本页遇到什么问题？