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MC100EP446MNR4G PDF预览

MC100EP446MNR4G

更新时间： 2024-02-02 23:14:55
品牌 Logo 应用领域
安森美 - ONSEMI 转换器
页数 文件大小 规格书
20页 269K
描述
3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter

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中文翻译

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MC100EP446MNR4G 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：VQCCN,针数：32
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.6其他特性：ECL MODE: VCC = 0V WITH VEE = -3V TO -5.5V
计数方向：RIGHT系列：100E
JESD-30 代码：S-PQCC-N32JESD-609代码：e3
长度：5 mm逻辑集成电路类型：PARALLEL IN SERIAL OUT
湿度敏感等级：1位数：8
功能数量：1端子数量：32
最高工作温度：85 °C最低工作温度：-40 °C
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：VQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, VERY THIN PROFILE峰值回流温度（摄氏度）：260
传播延迟（tpd）：1.025 ns认证状态：Not Qualified
座面最大高度：1 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：ECL
温度等级：INDUSTRIAL端子面层：Tin (Sn)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
触发器类型：NEGATIVE EDGE宽度：5 mm
最小 fmax：3200 MHzBase Number Matches：1

MC100EP446MNR4G 数据手册

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MC10EP446, MC100EP446  
3.3 V/5 V 8-Bit  
CMOS/ECL/TTL Data Input  
Parallel/Serial Converter  
Description  
http://onsemi.com  
The MC10/100EP446 is an integrated 8−bit parallel to serial data  
converter. The device is designed with unique circuit topology to  
operate for NRZ data rates up to 3.2 Gb/s. The conversion sequence  
from parallel data into a serial data stream is from bit D0 to D7. The  
parallel input pins D0−D7 are configurable to be threshold controlled by  
CMOS, ECL, or TTL level signals. The serial data rate output can be  
selected at internal clock data rate or twice the internal clock data rate  
using the CKSEL pin.  
Control pins are provided to reset (SYNC) and disable internal clock  
circuitry (CKEN). In either CKSEL modes, the internal flip−flops are  
triggered on the rising edge for CLK and the multiplexers are switched  
on the falling edge of CLK, therefore, all associated specification  
limits are referenced to the negative edge of the clock input.  
MARKING DIAGRAMS*  
MCxxx  
EP446  
AWLYYWWG  
LQFP−32  
FA SUFFIX  
CASE 873A  
Additionally, V pin is provided for single−ended input condition.  
BB  
The 100 Series devices contain temperature compensation network.  
1
MCxxx  
EP446  
Features  
32  
1
AWLYYWWG  
• 3.2 Gb/s Typical Data Rate Capability  
• Differential Clock and Serial Outputs  
QFN32  
MN SUFFIX  
CASE 488AM  
G
• V Output for Single-ended Input Applications  
BB  
• Asynchronous Data Reset (SYNC)  
• PECL Mode Operating Range:  
xxx  
A
= 10 or 100  
= Assembly Location  
V
= 3.0 V to 5.5 V with V = 0 V  
EE  
WL, L = Wafer Lot  
YY, Y = Year  
CC  
• NECL Mode Operating Range:  
= 0 V with V = −3.0 V to −5.5 V  
WW, W = Work Week  
V
CC  
EE  
G or G = Pb−Free Package  
• Open Input Default State  
• Safety Clamp on Inputs  
• Parallel Interface Can Support PECL, TTL or CMOS  
• Pb−Free Packages are Available*  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 18 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
February, 2007 − Rev. 9  
MC10EP446/D  
1234567...20

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