MC100E241
5VꢀECL 8-Bit Scannable
Register
Description
The MC100E241 is an 8-bit shiftable register. Unlike a standard
universal shift register such as the E141, the E241 features internal
data feedback organized so that the SHIFT control overrides the
HOLD/LOAD control. This enables the normal operations of HOLD
and LOAD to be toggled with a single control line without the need for
external gating. It also enables switching to scan mode with the single
SHIFT control line.
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The eight inputs D − D accept parallel input data, while S-IN
0
7
accepts serial input data when in shift mode. Data is accepted a set-up
time before the positive-going edge of CLK; shifting is also
accomplished on the positive clock edge. A HIGH on the Master Reset
pin (MR) asynchronously resets all the registers to zero.
PLCC−28
FN SUFFIX
CASE 776
The 100 Series contains temperature compensation.
Features
• SHIFT overrides HOLD/LOAD Control
• 1000 ps Max. CLK to Q
• Asynchronous Master Reset
• Pin-Compatible with E141
MARKING DIAGRAM*
1 28
• PECL Mode Operating Range: V = 4.2 V to 5.7 V
CC
MC100E241FNG
AWLYYWW
with V = 0 V
EE
• NECL Mode Operating Range: V = 0 V
CC
with V = −4.2 V to −5.7 V
EE
• Internal Input 50 kW Pulldown Resistors
• ESD Protection: Human Body Model; > 1 kV,
Machine Model; > 75 V
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level:
A
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
WL
YY
WW
G
Pb = 1
Pb−Free = 3
*For additional marking information, refer to
Application Note AND8002/D.
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
• Transistor Count = 529 devices
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
October, 2006 − Rev. 3
MC100E241/D